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riscv-gcc-1
Commit da57182d by Oleg Endo
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re PR target/53513 ([SH] Add support for fpchg insn and improve fenv support) 

gcc/
	PR target/53513
	* doc/extend.texi (__builtin_sh_set_fpscr): Fix typo.

From-SVN: r218563
parent 77e60088
Showing with 6 additions and 1 deletions
gcc/ChangeLog
2014-12-10 Oleg Endo <olegendo@gcc.gnu.org>
PR target/53513
* doc/extend.texi (__builtin_sh_set_fpscr): Fix typo.
2014-12-10 Marek Polacek <polacek@redhat.com>
PR tree-optimization/61686
gcc/doc/extend.texi
......@@ -16906,7 +16906,7 @@ int get_tcb_value (void)
Returns the value that is currently set in the @samp{FPSCR} register.
@end deftypefn
@deftypefn {Built-in Function} {void} __builtin_sh_get_fpscr (unsigned int @var{val})
@deftypefn {Built-in Function} {void} __builtin_sh_set_fpscr (unsigned int @var{val})
Sets the @samp{FPSCR} register to the specified value @var{val}, while
preserving the current values of the FR, SZ and PR bits.
@end deftypefn
......
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