Commit da37a70f by Richard Biener Committed by Richard Biener

re PR tree-optimization/82819 ([graphite] ICE in set_codegen_error, at…

re PR tree-optimization/82819 ([graphite] ICE in set_codegen_error, at graphite-isl-ast-to-gimple.c:206)

2018-01-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/82819
	* graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
	code generating pluses that are no-ops in the target precision.

	* gcc.dg/graphite/pr82819.c: New testcase.

From-SVN: r257012
parent df9e39b1
2018-01-24 Richard Biener <rguenther@suse.de> 2018-01-24 Richard Biener <rguenther@suse.de>
PR tree-optimization/82819
* graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
code generating pluses that are no-ops in the target precision.
2018-01-24 Richard Biener <rguenther@suse.de>
PR middle-end/84000 PR middle-end/84000
* tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind. * tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind.
......
...@@ -326,7 +326,8 @@ binary_op_to_tree (tree type, __isl_take isl_ast_expr *expr, ivs_params &ip) ...@@ -326,7 +326,8 @@ binary_op_to_tree (tree type, __isl_take isl_ast_expr *expr, ivs_params &ip)
/* From our constraint generation we may get modulo operations that /* From our constraint generation we may get modulo operations that
we cannot represent explicitely but that are no-ops for TYPE. we cannot represent explicitely but that are no-ops for TYPE.
Elide those. */ Elide those. */
if (expr_type == isl_ast_op_pdiv_r if ((expr_type == isl_ast_op_pdiv_r
|| expr_type == isl_ast_op_add)
&& isl_ast_expr_get_type (arg_expr) == isl_ast_expr_int && isl_ast_expr_get_type (arg_expr) == isl_ast_expr_int
&& (wi::exact_log2 (widest_int_from_isl_expr_int (arg_expr)) && (wi::exact_log2 (widest_int_from_isl_expr_int (arg_expr))
>= TYPE_PRECISION (type))) >= TYPE_PRECISION (type)))
......
2018-01-24 Richard Biener <rguenther@suse.de>
PR tree-optimization/82819
* gcc.dg/graphite/pr82819.c: New testcase.
2018-01-23 Paolo Carlini <paolo.carlini@oracle.com> 2018-01-23 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/83921 PR c++/83921
......
/* { dg-do compile } */
/* { dg-options "-O2 -floop-nest-optimize" } */
short int *ts;
void
c2 (unsigned long long int s4, int ns)
{
short int *b2 = (short int *)&ns;
while (ns != 0)
{
int xn;
for (xn = 0; xn < 3; ++xn)
for (*b2 = 0; *b2 < 2; ++*b2)
s4 += xn;
if (s4 != 0)
b2 = ts;
++ns;
}
}
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