Commit da1775d6 by Kazu Hirata Committed by Kazu Hirata

h8300.h: Fix formatting.

	* config/h8300/h8300.h: Fix formatting.
	* config/h8300/h8300.md: Likewise.

From-SVN: r49284
parent 8f2e963b
2002-01-28 Kazu Hirata <kazu@hxi.com>
* config/h8300/h8300.h: Fix formatting.
* config/h8300/h8300.md: Likewise.
2002-01-28 Loren J. Rittle <ljrittle@acm.org> 2002-01-28 Loren J. Rittle <ljrittle@acm.org>
* fixinc/inclhack.def (strict_ansi_not): Add a bypass based on * fixinc/inclhack.def (strict_ansi_not): Add a bypass based on
......
...@@ -1217,7 +1217,7 @@ readonly_data () \ ...@@ -1217,7 +1217,7 @@ readonly_data () \
while (0) while (0)
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
ASM_OUTPUT_LABEL(FILE, NAME) ASM_OUTPUT_LABEL (FILE, NAME)
/* The prefix to add to user-visible assembler symbols. */ /* The prefix to add to user-visible assembler symbols. */
......
...@@ -400,7 +400,7 @@ ...@@ -400,7 +400,7 @@
case 5: case 5:
return \"mov.w %T1,%e0\;mov.w %T1,%f0\"; return \"mov.w %T1,%e0\;mov.w %T1,%f0\";
default: default:
abort(); abort ();
} }
}" }"
[(set_attr "length" "4,4,8,8,4,4") [(set_attr "length" "4,4,8,8,4,4")
...@@ -456,7 +456,7 @@ ...@@ -456,7 +456,7 @@
case 5: case 5:
return \"mov.w %T1,%e0\;mov.w %T1,%f0\"; return \"mov.w %T1,%e0\;mov.w %T1,%f0\";
default: default:
abort(); abort ();
} }
}" }"
[(set_attr "length" "4,4,8,8,4,4") [(set_attr "length" "4,4,8,8,4,4")
...@@ -1302,7 +1302,7 @@ ...@@ -1302,7 +1302,7 @@
(set (match_operand:HI 0 "register_operand" "") (set (match_operand:HI 0 "register_operand" "")
(match_dup 2))] (match_dup 2))]
"" ""
"{ operands[2] = gen_reg_rtx (HImode); }") "operands[2] = gen_reg_rtx (HImode);")
(define_insn "neghi2_h8300h" (define_insn "neghi2_h8300h"
[(set (match_operand:HI 0 "register_operand" "=r") [(set (match_operand:HI 0 "register_operand" "=r")
...@@ -1332,7 +1332,7 @@ ...@@ -1332,7 +1332,7 @@
(set (match_operand:SI 0 "register_operand" "") (set (match_operand:SI 0 "register_operand" "")
(match_dup 2))] (match_dup 2))]
"" ""
"{ operands[2] = gen_reg_rtx(SImode); }") "operands[2] = gen_reg_rtx (SImode);")
(define_insn "negsi2_h8300h" (define_insn "negsi2_h8300h"
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
...@@ -1625,9 +1625,9 @@ ...@@ -1625,9 +1625,9 @@
}" }"
[(set_attr "cc" "clobber") [(set_attr "cc" "clobber")
(set (attr "length") (set (attr "length")
(if_then_else (match_operand:QI 0 "small_call_insn_operand" "") (if_then_else (match_operand:QI 0 "small_call_insn_operand" "")
(const_int 4) (const_int 4)
(const_int 8)))]) (const_int 8)))])
;; Call subroutine, returning value in operand 0 ;; Call subroutine, returning value in operand 0
;; (which must be a hard register). ;; (which must be a hard register).
...@@ -1649,9 +1649,9 @@ ...@@ -1649,9 +1649,9 @@
}" }"
[(set_attr "cc" "clobber") [(set_attr "cc" "clobber")
(set (attr "length") (set (attr "length")
(if_then_else (match_operand:QI 0 "small_call_insn_operand" "") (if_then_else (match_operand:QI 0 "small_call_insn_operand" "")
(const_int 4) (const_int 4)
(const_int 8)))]) (const_int 8)))])
(define_insn "nop" (define_insn "nop"
[(const_int 0)] [(const_int 0)]
......
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