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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
d913744e
Commit
d913744e
authored
Aug 22, 2011
by
Uros Bizjak
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* ChangeLog: Add missing change.
From-SVN: r177975
parent
1707583b
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@@ -5,6 +5,7 @@
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@@ -5,6 +5,7 @@
* config/i386/sse.md (VI_AVX2): New.
* config/i386/sse.md (VI_AVX2): New.
(<plusminus_insn><mode>3): Use VI_AVX2 mode iterator.
(<plusminus_insn><mode>3): Use VI_AVX2 mode iterator.
(*<plusminus_insn><mode>3): Ditto.
(*<plusminus_insn><mode>3): Ditto.
(<sse2_avx2>_andnot<mode>3): Ditto.
(*andnot<mode>3): Fix order of cond operands.
(*andnot<mode>3): Fix order of cond operands.
Add asserts for correct TARGET_xxx.
Add asserts for correct TARGET_xxx.
(*<any_logic:code><mode>3): Ditto.
(*<any_logic:code><mode>3): Ditto.
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