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lvzhengyang
riscv-gcc-1
Commits
d8f8ca80
Commit
d8f8ca80
authored
Mar 06, 2009
by
Ramana Radhakrishnan
Committed by
Ramana Radhakrishnan
Mar 06, 2009
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Fix isr documentation for ARM
From-SVN: r144668
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gcc/ChangeLog
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d8f8ca80
2009-03-06 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* doc/extend.texi (Function Attributes): Add documentation
for isr attributes.
2009-03-06 Jakub Jelinek <jakub@redhat.com>
2009-03-06 Jakub Jelinek <jakub@redhat.com>
PR debug/39387
PR debug/39387
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gcc/doc/extend.texi
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d8f8ca80
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@@ -2436,6 +2436,11 @@ to run as a thread. The compiler omits generate prologue/epilogue
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@@ -2436,6 +2436,11 @@ to run as a thread. The compiler omits generate prologue/epilogue
sequences and replaces the return instruction with a @code{sleep}
sequences and replaces the return instruction with a @code{sleep}
instruction. This attribute is available only on fido.
instruction. This attribute is available only on fido.
@item isr
@cindex interrupt service routines on ARM
Use this attribute on ARM to write Interrupt Service Routines. This is an
alias to the @code{interrupt} attribute above.
@item kspisusp
@item kspisusp
@cindex User stack pointer in interrupts on the Blackfin
@cindex User stack pointer in interrupts on the Blackfin
When used together with @code{interrupt_handler}, @code{exception_handler}
When used together with @code{interrupt_handler}, @code{exception_handler}
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