Fix vext[us]64_1.c test on ARM by unsharing test body.

	* gcc.target/arm/simd/vexts64_1.c: Remove #include, inline test body.
	* gcc.target/arm/simd/vextu64_1.c: Likewise.
	* gcc.target/aarch64/simd/ext_s64_1.c: Likewise.
	* gcc.target/aarch64/simd/ext_u64_1.c: Likewise.
	* gcc.target/aarch64/simd/ext_s64.x: Remove.
	* gcc.target/aarch64/simd/ext_u64.x: Remove.

From-SVN: r212914

gcc/testsuite/ChangeLog

+2014-07-22  Alan Lawrence  <alan.lawrence@arm.com>
+
+	* gcc.target/arm/simd/vexts64_1.c: Remove #include, inline test body.
+	* gcc.target/arm/simd/vextu64_1.c: Likewise.
+	* gcc.target/aarch64/simd/ext_s64_1.c: Likewise.
+	* gcc.target/aarch64/simd/ext_u64_1.c: Likewise.
+	* gcc.target/aarch64/simd/ext_s64.x: Remove.
+	* gcc.target/aarch64/simd/ext_u64.x: Remove.
+
 2014-07-22  Yuri Rumyantsev  <ysrumyan@gmail.com>
 
 	PR tree-optimization/61822

gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x

-extern void abort (void);
-
-int
-main (int argc, char **argv)
-{
-  int i, off;
-  int64_t arr1[] = {0};
-  int64x1_t in1 = vld1_s64 (arr1);
-  int64_t arr2[] = {1};
-  int64x1_t in2 = vld1_s64 (arr2);
-  int64x1_t actual = vext_s64 (in1, in2, 0);
-  if (actual[0] != in1[0])
-    abort ();
-
-  return 0;
-}
-

gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c

@@ -4,7 +4,22 @@
 /* { dg-options "-save-temps -O3 -fno-inline" } */
 
 #include "arm_neon.h"
-#include "ext_s64.x"
+
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  int64_t arr1[] = {0};
+  int64x1_t in1 = vld1_s64 (arr1);
+  int64_t arr2[] = {1};
+  int64x1_t in2 = vld1_s64 (arr2);
+  int64x1_t actual = vext_s64 (in1, in2, 0);
+  if (actual[0] != in1[0])
+    abort ();
+
+  return 0;
+}
 
 /* Do not scan-assembler.  An EXT instruction could be emitted, but would merely
    return its first argument, so it is legitimate to optimize it out.  */

gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x

-extern void abort (void);
-
-int
-main (int argc, char **argv)
-{
-  int i, off;
-  uint64_t arr1[] = {0};
-  uint64x1_t in1 = vld1_u64 (arr1);
-  uint64_t arr2[] = {1};
-  uint64x1_t in2 = vld1_u64 (arr2);
-  uint64x1_t actual = vext_u64 (in1, in2, 0);
-  if (actual[0] != in1[0])
-    abort ();
-
-  return 0;
-}
-

gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c

@@ -4,7 +4,22 @@
 /* { dg-options "-save-temps -O3 -fno-inline" } */
 
 #include "arm_neon.h"
-#include "ext_u64.x"
+
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  uint64_t arr1[] = {0};
+  uint64x1_t in1 = vld1_u64 (arr1);
+  uint64_t arr2[] = {1};
+  uint64x1_t in2 = vld1_u64 (arr2);
+  uint64x1_t actual = vext_u64 (in1, in2, 0);
+  if (actual[0] != in1[0])
+    abort ();
+
+  return 0;
+}
 
 /* Do not scan-assembler.  An EXT instruction could be emitted, but would merely
    return its first argument, so it is legitimate to optimize it out.  */

gcc/testsuite/gcc.target/arm/simd/vexts64_1.c

@@ -6,7 +6,22 @@
 /* { dg-add-options arm_neon } */
 
 #include "arm_neon.h"
-#include "../../aarch64/simd/ext_s64.x"
+
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  int64_t arr1[] = {0};
+  int64x1_t in1 = vld1_s64 (arr1);
+  int64_t arr2[] = {1};
+  int64x1_t in2 = vld1_s64 (arr2);
+  int64x1_t actual = vext_s64 (in1, in2, 0);
+  if (actual != in1)
+    abort ();
+
+  return 0;
+}
 
 /* Don't scan assembler for vext - it can be optimized into a move from r0.  */
 /* { dg-final { cleanup-saved-temps } } */

gcc/testsuite/gcc.target/arm/simd/vextu64_1.c

@@ -6,7 +6,22 @@
 /* { dg-add-options arm_neon } */
 
 #include "arm_neon.h"
-#include "../../aarch64/simd/ext_u64.x"
+
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  uint64_t arr1[] = {0};
+  uint64x1_t in1 = vld1_u64 (arr1);
+  uint64_t arr2[] = {1};
+  uint64x1_t in2 = vld1_u64 (arr2);
+  uint64x1_t actual = vext_u64 (in1, in2, 0);
+  if (actual != in1)
+    abort ();
+
+  return 0;
+}
 
 /* Don't scan assembler for vext - it can be optimized into a move from r0.  */
 /* { dg-final { cleanup-saved-temps } } */