Commit d865b122 by David Edelsohn Committed by David Edelsohn

rs6000.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.

        * config/rs6000/rs6000.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
        * config/rs6000/rs6000.md (clzsi2): Rename from cntlzw2.
        (ffssi2): Use clz instead of unspec.
        (clzdi2): Rename from cntlzd2.
        (ffsdi2): Use clz instead of unspec.

From-SVN: r62570
parent 8f37dd98
2003-02-07 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
* config/rs6000/rs6000.md (clzsi2): Rename from cntlzw2.
(ffssi2): Use clz instead of unspec.
(clzdi2): Rename from cntlzd2.
(ffsdi2): Use clz instead of unspec.
2003-02-07 Loren James Rittle <ljrittle@acm.org> 2003-02-07 Loren James Rittle <ljrittle@acm.org>
* config/alpha/freebsd.h (LINK_SPEC): Weaken error to notice. * config/alpha/freebsd.h (LINK_SPEC): Weaken error to notice.
......
...@@ -2270,6 +2270,10 @@ do { \ ...@@ -2270,6 +2270,10 @@ do { \
is done just by pretending it is already truncated. */ is done just by pretending it is already truncated. */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
/* The cntlzw and cntlzd instructions return 32 and 64 for zero. */
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
((VALUE) = ((MODE) == SImode ? 32 : 64))
/* Specify the machine mode that pointers have. /* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */ between pointers and any other objects of this machine mode. */
......
...@@ -2371,7 +2371,7 @@ ...@@ -2371,7 +2371,7 @@
(parallel [(set (match_dup 3) (and:SI (match_dup 1) (parallel [(set (match_dup 3) (and:SI (match_dup 1)
(match_dup 2))) (match_dup 2)))
(clobber (scratch:CC))]) (clobber (scratch:CC))])
(set (match_dup 4) (unspec:SI [(match_dup 3)] 21)) (set (match_dup 4) (clz:SI (match_dup 3)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (set (match_operand:SI 0 "gpc_reg_operand" "=r")
(minus:SI (const_int 32) (match_dup 4)))] (minus:SI (const_int 32) (match_dup 4)))]
"" ""
...@@ -2381,9 +2381,9 @@ ...@@ -2381,9 +2381,9 @@
operands[4] = gen_reg_rtx (SImode); operands[4] = gen_reg_rtx (SImode);
}) })
(define_insn "cntlzw2" (define_insn "clzsi2"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(unspec:SI [(match_operand:SI 1 "gpc_reg_operand" "r")] 21))] (clz:SI (match_operand:SI 1 "gpc_reg_operand" "r")))]
"" ""
"{cntlz|cntlzw} %0,%1") "{cntlz|cntlzw} %0,%1")
...@@ -6746,7 +6746,7 @@ ...@@ -6746,7 +6746,7 @@
(parallel [(set (match_dup 3) (and:DI (match_dup 1) (parallel [(set (match_dup 3) (and:DI (match_dup 1)
(match_dup 2))) (match_dup 2)))
(clobber (scratch:CC))]) (clobber (scratch:CC))])
(set (match_dup 4) (unspec:DI [(match_dup 3)] 21)) (set (match_dup 4) (clz:DI (match_dup 3)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (set (match_operand:DI 0 "gpc_reg_operand" "=r")
(minus:DI (const_int 64) (match_dup 4)))] (minus:DI (const_int 64) (match_dup 4)))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
...@@ -6756,9 +6756,9 @@ ...@@ -6756,9 +6756,9 @@
operands[4] = gen_reg_rtx (DImode); operands[4] = gen_reg_rtx (DImode);
}) })
(define_insn "cntlzd2" (define_insn "clzdi2"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r") [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(unspec:DI [(match_operand:DI 1 "gpc_reg_operand" "r")] 21))] (clz:DI (match_operand:DI 1 "gpc_reg_operand" "r")))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"cntlzd %0,%1") "cntlzd %0,%1")
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment