Commit d7d1451a by Bill Schmidt Committed by William Schmidt

rs6000.c (vspltis_constant): Make sure we check all elements for both endian flavors.

2013-10-19  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (vspltis_constant): Make sure we check
	all elements for both endian flavors.

From-SVN: r203863
parent 7aa14ddb
2013-10-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (vspltis_constant): Make sure we check
all elements for both endian flavors.
2013-10-19 Uros Bizjak <ubizjak@gmail.com> 2013-10-19 Uros Bizjak <ubizjak@gmail.com>
PR target/58792 PR target/58792
......
...@@ -4981,15 +4981,16 @@ vspltis_constant (rtx op, unsigned step, unsigned copies) ...@@ -4981,15 +4981,16 @@ vspltis_constant (rtx op, unsigned step, unsigned copies)
/* Check if VAL is present in every STEP-th element, and the /* Check if VAL is present in every STEP-th element, and the
other elements are filled with its most significant bit. */ other elements are filled with its most significant bit. */
for (i = 0; i < nunits - 1; ++i) for (i = 1; i < nunits; ++i)
{ {
HOST_WIDE_INT desired_val; HOST_WIDE_INT desired_val;
if (((BYTES_BIG_ENDIAN ? i + 1 : i) & (step - 1)) == 0) unsigned elt = BYTES_BIG_ENDIAN ? nunits - 1 - i : i;
if ((i & (step - 1)) == 0)
desired_val = val; desired_val = val;
else else
desired_val = msb_val; desired_val = msb_val;
if (desired_val != const_vector_elt_as_int (op, i)) if (desired_val != const_vector_elt_as_int (op, elt))
return false; return false;
} }
......
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