Correct subreg no-op handling for big-endian vec_select.

gcc/

	PR target/84711
	* rtlanal.c (set_noop_p): Constrain on mode change,
	include hard-reg-set.h

gcc/testuite/

	PR target/84711
	* gcc.dg/vect/pr84711.c: New.

From-SVN: r262435

gcc/ChangeLog

 2018-07-05  Tamar Christina  <tamar.christina@arm.com>
 
+	PR target/84711
+	* rtlanal.c (set_noop_p): Constrain on mode change,
+	include hard-reg-set.h
+
+2018-07-05  Tamar Christina  <tamar.christina@arm.com>
+
 	* config/aarch64/aarch64.c (aarch64_expand_movmem): Fix mode size.
 
 2018-07-05  Jakub Jelinek  <jakub@redhat.com>

gcc/rtlanal.c

@@ -35,6 +35,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "recog.h"
 #include "addresses.h"
 #include "rtl-iter.h"
+#include "hard-reg-set.h"
 
 /* Forward declarations */
 static void set_of_1 (rtx, const_rtx, void *);
@@ -1621,8 +1622,9 @@ set_noop_p (const_rtx set)
 	if (maybe_ne (rtx_to_poly_int64 (XVECEXP (par, 0, i)), c0 + i))
 	  return 0;
       return
-	simplify_subreg_regno (REGNO (src0), GET_MODE (src0),
-			       offset, GET_MODE (dst)) == (int) REGNO (dst);
+	REG_CAN_CHANGE_MODE_P (REGNO (dst), GET_MODE (src0), GET_MODE (dst))
+	&& simplify_subreg_regno (REGNO (src0), GET_MODE (src0),
+				  offset, GET_MODE (dst)) == (int) REGNO (dst);
     }
 
   return (REG_P (src) && REG_P (dst)

gcc/testsuite/ChangeLog

 2018-07-05  Tamar Christina  <tamar.christina@arm.com>
 
+	PR target/84711
+	* gcc.dg/vect/pr84711.c: New.
+
+2018-07-05  Tamar Christina  <tamar.christina@arm.com>
+
 	* gcc.target/aarch64/struct_cpy.c: New.
 
 2018-07-05  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/testsuite/gcc.dg/vect/pr84711.c

+/* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
+/* { dg-options "-O2" } */
+
+typedef int v4si
+  __attribute__ ((vector_size (16)));
+
+int fn1 (v4si p)
+{
+  return p[0];
+}
+