Skip to content

R
riscv-gcc-1
Commit d65485c5 by Claudiu Zissulescu Committed by Claudiu Zissulescu
Options

[ARC] Update warning messges. 

When we pass an mcpu to the compiler we have two types of (hardware
configuration) flags that are set:

1. Architecture specific, for example code-density is always enabled
for ARCHS architectures. These options are overwriting whatever the
corresponding user options with the preset ones.

2. CPU specific, for example archs is using LL64 option by
default. These options can be freely enabled or disabled.

Because of the above complexity, we need to throw some errors for the
user to know when he/she does something which goes against the above
rules. Thus, I came up with the following set of rules:

1. Overwriting default architecture specific hardware option: it is
ignored, a warning is thrown;

2. Overwriting default CPU specific hardware option: it is taken into
account, a warning is thrown.

gcc/
2018-06-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc-arch.h: Update ARC_OPTX macro.
	* config/arc/arc-options.def (ARC_OPTX): Introduce a new doc
	field.
	* config/arc/arc.c (arc_init): Update pic warning.
	(irq_range): Update irq range parsing warnings.
	(arc_override_options): Update various warning messages.
	(arc_handle_aux_attribute): Likewise.

gcc/testsuite
2018-06-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/builtin_simdarc.c: Update test.
	* gcc.target/arc/mulsi3_highpart-2.c: Likewise.
	* gcc.target/arc/tumaddsidi4.c: Likewise.

From-SVN: r261495
parent 5def02b7
Showing with 96 additions and 62 deletions
gcc/ChangeLog
2018-06-12 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-arch.h: Update ARC_OPTX macro.
* config/arc/arc-options.def (ARC_OPTX): Introduce a new doc
field.
* config/arc/arc.c (arc_init): Update pic warning.
(irq_range): Update irq range parsing warnings.
(arc_override_options): Update various warning messages.
(arc_handle_aux_attribute): Likewise.
2018-06-12 Robert Suchanek <robert.suchanek@mips.com> 2018-06-12 Robert Suchanek <robert.suchanek@mips.com>
* config/mips/i6400.md (i6400_fpu_fadd): Remove frint. * config/mips/i6400.md (i6400_fpu_fadd): Remove frint.
......
gcc/config/arc/arc-arch.h
...@@ -28,7 +28,7 @@ along with GCC; see the file COPYING3. If not see ...@@ -28,7 +28,7 @@ along with GCC; see the file COPYING3. If not see
enum cpu_flags enum cpu_flags
{ {
#define ARC_OPT(NAME, CODE, MASK, DOC) NAME = CODE, #define ARC_OPT(NAME, CODE, MASK, DOC) NAME = CODE,
#define ARC_OPTX(NAME, CODE, VAR, VAL, DOC) NAME = CODE, #define ARC_OPTX(NAME, CODE, VAR, VAL, DOC0, DOC1) NAME = CODE,
#include "arc-options.def" #include "arc-options.def"
#undef ARC_OPT #undef ARC_OPT
#undef ARC_OPTX #undef ARC_OPTX
......
gcc/config/arc/arc-options.def
...@@ -74,32 +74,32 @@ ARC_OPT (FL_DPFP, (1ULL << 13), MASK_DPFP_COMPACT_SET, "double precission FP ...@@ -74,32 +74,32 @@ ARC_OPT (FL_DPFP, (1ULL << 13), MASK_DPFP_COMPACT_SET, "double precission FP
ARC_OPT (FL_ARGONAUT, (1ULL << 14), MASK_ARGONAUT_SET, "argonaut") ARC_OPT (FL_ARGONAUT, (1ULL << 14), MASK_ARGONAUT_SET, "argonaut")
ARC_OPT (FL_SIMD, (1ULL << 15), MASK_SIMD_SET, "simd") ARC_OPT (FL_SIMD, (1ULL << 15), MASK_SIMD_SET, "simd")
ARC_OPTX (FL_MPYOPT_1, (1ULL << 17), arc_mpy_option, 1, "mpy option w") ARC_OPTX (FL_MPYOPT_1, (1ULL << 17), arc_mpy_option, 1, "mpy-option", "w")
ARC_OPTX (FL_MPYOPT_2, (1ULL << 18), arc_mpy_option, 2, "mpy option wlh1") ARC_OPTX (FL_MPYOPT_2, (1ULL << 18), arc_mpy_option, 2, "mpy-option", "wlh1")
ARC_OPTX (FL_MPYOPT_3, (1ULL << 19), arc_mpy_option, 3, "mpy option wlh2") ARC_OPTX (FL_MPYOPT_3, (1ULL << 19), arc_mpy_option, 3, "mpy-option", "wlh2")
ARC_OPTX (FL_MPYOPT_4, (1ULL << 20), arc_mpy_option, 4, "mpy option wlh3") ARC_OPTX (FL_MPYOPT_4, (1ULL << 20), arc_mpy_option, 4, "mpy-option", "wlh3")
ARC_OPTX (FL_MPYOPT_5, (1ULL << 21), arc_mpy_option, 5, "mpy option wlh4") ARC_OPTX (FL_MPYOPT_5, (1ULL << 21), arc_mpy_option, 5, "mpy-option", "wlh4")
ARC_OPTX (FL_MPYOPT_6, (1ULL << 22), arc_mpy_option, 6, "mpy option wlh5") ARC_OPTX (FL_MPYOPT_6, (1ULL << 22), arc_mpy_option, 6, "mpy-option", "wlh5")
ARC_OPTX (FL_MPYOPT_7, (1ULL << 23), arc_mpy_option, 7, "mpy option plus_dmpy") ARC_OPTX (FL_MPYOPT_7, (1ULL << 23), arc_mpy_option, 7, "mpy-option", "plus_dmpy")
ARC_OPTX (FL_MPYOPT_8, (1ULL << 24), arc_mpy_option, 8, "mpy option plus_macd") ARC_OPTX (FL_MPYOPT_8, (1ULL << 24), arc_mpy_option, 8, "mpy-option", "plus_macd")
ARC_OPTX (FL_MPYOPT_9, (1ULL << 25), arc_mpy_option, 9, "mpy option plus_qmacw") ARC_OPTX (FL_MPYOPT_9, (1ULL << 25), arc_mpy_option, 9, "mpy-option", "plus_qmacw")
ARC_OPT (FL_MPYOPT_7_9, (0x01c2ULL << 17), 0, "mpy option") ARC_OPT (FL_MPYOPT_7_9, (0x01c2ULL << 17), 0, "mpy option")
ARC_OPT (FL_MPYOPT_1_6, (0x003fULL << 17), 0, "mpy option") ARC_OPT (FL_MPYOPT_1_6, (0x003fULL << 17), 0, "mpy option")
ARC_OPTX (FL_FPU_FPUS, (1ULL << 26), arc_fpu_build, FPU_FPUS, "mfpu=fpus") ARC_OPTX (FL_FPU_FPUS, (1ULL << 26), arc_fpu_build, FPU_FPUS, "mfpu", "fpus")
ARC_OPTX (FL_FPU_FPUS_DIV, (1ULL << 27), arc_fpu_build, FPU_FPUS_DIV, "mfpu=fpus_div") ARC_OPTX (FL_FPU_FPUS_DIV, (1ULL << 27), arc_fpu_build, FPU_FPUS_DIV, "mfpu", "fpus_div")
ARC_OPTX (FL_FPU_FPUS_FMA, (1ULL << 28), arc_fpu_build, FPU_FPUS_FMA, "mfpu=fpus_fma") ARC_OPTX (FL_FPU_FPUS_FMA, (1ULL << 28), arc_fpu_build, FPU_FPUS_FMA, "mfpu", "fpus_fma")
ARC_OPTX (FL_FPU_FPUS_ALL, (1ULL << 29), arc_fpu_build, FPU_FPUS_ALL, "mfpu=fpus_all") ARC_OPTX (FL_FPU_FPUS_ALL, (1ULL << 29), arc_fpu_build, FPU_FPUS_ALL, "mfpu", "fpus_all")
ARC_OPTX (FL_FPU_FPUDA, (1ULL << 30), arc_fpu_build, FPU_FPUDA, "mfpu=fpuda") ARC_OPTX (FL_FPU_FPUDA, (1ULL << 30), arc_fpu_build, FPU_FPUDA, "mfpu", "fpuda")
ARC_OPTX (FL_FPU_FPUDA_DIV, (1ULL << 31), arc_fpu_build, FPU_FPUDA_DIV, "mfpu=fpuda_div") ARC_OPTX (FL_FPU_FPUDA_DIV, (1ULL << 31), arc_fpu_build, FPU_FPUDA_DIV, "mfpu", "fpuda_div")
ARC_OPTX (FL_FPU_FPUDA_FMA, (1ULL << 32), arc_fpu_build, FPU_FPUDA_FMA, "mfpu=fpuda_fma") ARC_OPTX (FL_FPU_FPUDA_FMA, (1ULL << 32), arc_fpu_build, FPU_FPUDA_FMA, "mfpu", "fpuda_fma")
ARC_OPTX (FL_FPU_FPUDA_ALL, (1ULL << 33), arc_fpu_build, FPU_FPUDA_ALL, "mfpu=fpuda_all") ARC_OPTX (FL_FPU_FPUDA_ALL, (1ULL << 33), arc_fpu_build, FPU_FPUDA_ALL, "mfpu", "fpuda_all")
ARC_OPTX (FL_FPU_FPUD, (1ULL << 34), arc_fpu_build, FPU_FPUD, "mfpu=fpud") ARC_OPTX (FL_FPU_FPUD, (1ULL << 34), arc_fpu_build, FPU_FPUD, "mfpu", "fpud")
ARC_OPTX (FL_FPU_FPUD_DIV, (1ULL << 35), arc_fpu_build, FPU_FPUD_DIV, "mfpu=fpud_div") ARC_OPTX (FL_FPU_FPUD_DIV, (1ULL << 35), arc_fpu_build, FPU_FPUD_DIV, "mfpu", "fpud_div")
ARC_OPTX (FL_FPU_FPUD_FMA, (1ULL << 36), arc_fpu_build, FPU_FPUD_FMA, "mfpu=fpud_fma") ARC_OPTX (FL_FPU_FPUD_FMA, (1ULL << 36), arc_fpu_build, FPU_FPUD_FMA, "mfpu", "fpud_fma")
ARC_OPTX (FL_FPU_FPUD_ALL, (1ULL << 37), arc_fpu_build, FPU_FPUD_ALL, "mfpu=fpud_all") ARC_OPTX (FL_FPU_FPUD_ALL, (1ULL << 37), arc_fpu_build, FPU_FPUD_ALL, "mfpu", "fpud_all")
ARC_OPTX (FL_FPX_QUARK, (1ULL << 38), arc_fpu_build, FPX_QK, "quarkse fp") ARC_OPTX (FL_FPX_QUARK, (1ULL << 38), arc_fpu_build, FPX_QK, "quarkse fp", "N.A.")
ARC_OPT (FL_FPUS, (0xFULL << 26), 0, "single precission floating point") ARC_OPT (FL_FPUS, (0xFULL << 26), 0, "single precission floating point")
ARC_OPT (FL_FPUDA, (0xFFULL << 26), 0, "double precission fp assist") ARC_OPT (FL_FPUDA, (0xFFULL << 26), 0, "double precission fp assist")
......
gcc/config/arc/arc.c
...@@ -934,7 +934,7 @@ arc_init (void) ...@@ -934,7 +934,7 @@ arc_init (void)
/* Warn for unimplemented PIC in pre-ARC700 cores, and disable flag_pic. */ /* Warn for unimplemented PIC in pre-ARC700 cores, and disable flag_pic. */
if (flag_pic && TARGET_ARC600_FAMILY) if (flag_pic && TARGET_ARC600_FAMILY)
{ {
warning (DK_WARNING, warning (0,
"PIC is not supported for %s. Generating non-PIC code only..", "PIC is not supported for %s. Generating non-PIC code only..",
arc_cpu_string); arc_cpu_string);
flag_pic = 0; flag_pic = 0;
...@@ -998,7 +998,7 @@ irq_range (const char *cstr) ...@@ -998,7 +998,7 @@ irq_range (const char *cstr)
dash = strchr (str, '-'); dash = strchr (str, '-');
if (!dash) if (!dash)
{ {
warning (0, "value of -mirq-ctrl-saved must have form R0-REGx"); warning (OPT_mirq_ctrl_saved_, "missing dash");
return; return;
} }
*dash = '\0'; *dash = '\0';
...@@ -1010,7 +1010,7 @@ irq_range (const char *cstr) ...@@ -1010,7 +1010,7 @@ irq_range (const char *cstr)
first = decode_reg_name (str); first = decode_reg_name (str);
if (first != 0) if (first != 0)
{ {
warning (0, "first register must be R0"); warning (OPT_mirq_ctrl_saved_, "first register must be R0");
return; return;
} }
...@@ -1023,13 +1023,14 @@ irq_range (const char *cstr) ...@@ -1023,13 +1023,14 @@ irq_range (const char *cstr)
if (last < 0) if (last < 0)
{ {
warning (0, "unknown register name: %s", dash + 1); warning (OPT_mirq_ctrl_saved_, "unknown register name: %s", dash + 1);
return; return;
} }
if (!(last & 0x01)) if (!(last & 0x01))
{ {
warning (0, "last register name %s must be an odd register", dash + 1); warning (OPT_mirq_ctrl_saved_,
"last register name %s must be an odd register", dash + 1);
return; return;
} }
...@@ -1037,7 +1038,8 @@ irq_range (const char *cstr) ...@@ -1037,7 +1038,8 @@ irq_range (const char *cstr)
if (first > last) if (first > last)
{ {
warning (0, "%s-%s is an empty range", str, dash + 1); warning (OPT_mirq_ctrl_saved_,
"%s-%s is an empty range", str, dash + 1);
return; return;
} }
...@@ -1062,7 +1064,8 @@ irq_range (const char *cstr) ...@@ -1062,7 +1064,8 @@ irq_range (const char *cstr)
break; break;
default: default:
warning (0, "unknown register name: %s", str); warning (OPT_mirq_ctrl_saved_,
"unknown register name: %s", str);
return; return;
} }
} }
...@@ -1147,14 +1150,16 @@ arc_override_options (void) ...@@ -1147,14 +1150,16 @@ arc_override_options (void)
if (TARGET_V2) if (TARGET_V2)
irq_range (opt->arg); irq_range (opt->arg);
else else
warning (0, "option -mirq-ctrl-saved valid only for ARC v2 processors"); warning (OPT_mirq_ctrl_saved_,
"option -mirq-ctrl-saved valid only for ARC v2 processors");
break; break;
case OPT_mrgf_banked_regs_: case OPT_mrgf_banked_regs_:
if (TARGET_V2) if (TARGET_V2)
parse_mrgf_banked_regs_option (opt->arg); parse_mrgf_banked_regs_option (opt->arg);
else else
warning (0, "option -mrgf-banked-regs valid only for ARC v2 processors"); warning (OPT_mrgf_banked_regs_,
"option -mrgf-banked-regs valid only for ARC v2 processors");
break; break;
default: default:
...@@ -1186,6 +1191,42 @@ arc_override_options (void) ...@@ -1186,6 +1191,42 @@ arc_override_options (void)
} }
} }
/* Check options against architecture options. Throw an error if
option is not allowed. Extra, check options against default
architecture/cpu flags and throw an warning if we find a
mismatch. */
#define ARC_OPTX(NAME, CODE, VAR, VAL, DOC0, DOC1) \
do { \
if ((!(arc_selected_cpu->arch_info->flags & CODE)) \
&& (VAR == VAL)) \
error ("Option %s=%s is not available for %s CPU.", \
DOC0, DOC1, arc_selected_cpu->name); \
if ((arc_selected_cpu->arch_info->dflags & CODE) \
&& (VAR != DEFAULT_##VAR) \
&& (VAR != VAL)) \
warning (0, "Option %s is ignored, the default value %s" \
" is considered for %s CPU.", DOC0, DOC1, \
arc_selected_cpu->name); \
} while (0);
#define ARC_OPT(NAME, CODE, MASK, DOC) \
do { \
if ((!(arc_selected_cpu->arch_info->flags & CODE)) \
&& (target_flags & MASK)) \
error ("Option %s is not available for %s CPU", \
DOC, arc_selected_cpu->name); \
if ((arc_selected_cpu->arch_info->dflags & CODE) \
&& (target_flags_explicit & MASK) \
&& (!(target_flags & MASK))) \
warning (0, "Unset option %s is ignored, it is always" \
" enabled for %s CPU.", DOC, \
arc_selected_cpu->name); \
} while (0);
#include "arc-options.def"
#undef ARC_OPTX
#undef ARC_OPT
/* Set cpu flags accordingly to architecture/selected cpu. The cpu /* Set cpu flags accordingly to architecture/selected cpu. The cpu
specific flags are set in arc-common.c. The architecture forces specific flags are set in arc-common.c. The architecture forces
the default hardware configurations in, regardless what command the default hardware configurations in, regardless what command
...@@ -1199,7 +1240,7 @@ arc_override_options (void) ...@@ -1199,7 +1240,7 @@ arc_override_options (void)
if (arc_selected_cpu->arch_info->dflags & CODE) \ if (arc_selected_cpu->arch_info->dflags & CODE) \
target_flags |= MASK; \ target_flags |= MASK; \
} while (0); } while (0);
#define ARC_OPTX(NAME, CODE, VAR, VAL, DOC) \ #define ARC_OPTX(NAME, CODE, VAR, VAL, DOC0, DOC1) \
do { \ do { \
if ((arc_selected_cpu->flags & CODE) \ if ((arc_selected_cpu->flags & CODE) \
&& (VAR == DEFAULT_##VAR)) \ && (VAR == DEFAULT_##VAR)) \
...@@ -1213,30 +1254,6 @@ arc_override_options (void) ...@@ -1213,30 +1254,6 @@ arc_override_options (void)
#undef ARC_OPTX #undef ARC_OPTX
#undef ARC_OPT #undef ARC_OPT
/* Check options against architecture options. Throw an error if
option is not allowed. */
#define ARC_OPTX(NAME, CODE, VAR, VAL, DOC) \
do { \
if ((VAR == VAL) \
&& (!(arc_selected_cpu->arch_info->flags & CODE))) \
{ \
error ("%s is not available for %s architecture", \
DOC, arc_selected_cpu->arch_info->name); \
} \
} while (0);
#define ARC_OPT(NAME, CODE, MASK, DOC) \
do { \
if ((target_flags & MASK) \
&& (!(arc_selected_cpu->arch_info->flags & CODE))) \
error ("%s is not available for %s architecture", \
DOC, arc_selected_cpu->arch_info->name); \
} while (0);
#include "arc-options.def"
#undef ARC_OPTX
#undef ARC_OPT
/* Set Tune option. */ /* Set Tune option. */
if (arc_tune == ARC_TUNE_NONE) if (arc_tune == ARC_TUNE_NONE)
arc_tune = (enum arc_tune_attr) arc_selected_cpu->tune; arc_tune = (enum arc_tune_attr) arc_selected_cpu->tune;
...@@ -1249,7 +1266,8 @@ arc_override_options (void) ...@@ -1249,7 +1266,8 @@ arc_override_options (void)
{ {
if (TARGET_COMPACT_CASESI) if (TARGET_COMPACT_CASESI)
{ {
warning (0, "compact-casesi is not applicable to ARCv2"); warning (OPT_mcompact_casesi,
"compact-casesi is not applicable to ARCv2");
TARGET_COMPACT_CASESI = 0; TARGET_COMPACT_CASESI = 0;
} }
} }
...@@ -10717,7 +10735,7 @@ arc_handle_aux_attribute (tree *node, ...@@ -10717,7 +10735,7 @@ arc_handle_aux_attribute (tree *node,
tree arg = TREE_VALUE (args); tree arg = TREE_VALUE (args);
if (TREE_CODE (arg) != INTEGER_CST) if (TREE_CODE (arg) != INTEGER_CST)
{ {
warning (0, "%qE attribute allows only an integer " warning (OPT_Wattributes, "%qE attribute allows only an integer "
"constant argument", name); "constant argument", name);
*no_add_attrs = true; *no_add_attrs = true;
} }
......
gcc/testsuite/ChangeLog
2018-06-12 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/builtin_simdarc.c: Update test.
* gcc.target/arc/mulsi3_highpart-2.c: Likewise.
* gcc.target/arc/tumaddsidi4.c: Likewise.
2018-06-12 Eric Botcazou <ebotcazou@adacore.com> 2018-06-12 Eric Botcazou <ebotcazou@adacore.com>
* gnat.dg/opt72a.ad[sb]: New test. * gnat.dg/opt72a.ad[sb]: New test.
......
gcc/testsuite/gcc.target/arc/builtin_simdarc.c
/* { dg-do compile } */ /* { dg-do compile } */
/* { dg-skip-if "" { ! { clmcpu } } } */ /* { dg-skip-if "" { ! { clmcpu } } } */
/* { dg-options "-mcpu=archs -O2 -Werror-implicit-function-declaration -mmpy-option=9" } */ /* { dg-options "-mcpu=hs38 -O2 -Werror-implicit-function-declaration -mmpy-option=9" } */
#define STEST(name, rettype, op1type, op2type) \ #define STEST(name, rettype, op1type, op2type) \
rettype test_ ## name \ rettype test_ ## name \
......
gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c
/* { dg-do run } */ /* { dg-do run } */
/* { dg-skip-if "ARC700 always has mpy option on" { arc700 } } */ /* { dg-skip-if "ARC700 always has mpy option on" { arc700 } } */
/* { dg-skip-if "ARC600 doesn't have mpy instruction" { arc6xx } } */ /* { dg-skip-if "ARC600 doesn't have mpy instruction" { arc6xx } } */
/* { dg-options "-O2 --save-temps -mmpy-option=0" } */ /* { dg-options "-O2 -mmpy-option=0 -w" } */
#include <stdlib.h> #include <stdlib.h>
......
gcc/testsuite/gcc.target/arc/tumaddsidi4.c
/* { dg-do compile } */ /* { dg-do compile } */
/* { dg-options "-mcpu=archs -O1 -mmpy-option=plus_dmpy" } */ /* { dg-options "-mcpu=archs -O1 -mmpy-option=plus_dmpy -w" } */
/* Check how we generate umaddsidi4 patterns. */ /* Check how we generate umaddsidi4 patterns. */
long a; long a;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment