Commit d5c4f75d by Ilya Leoshkevich Committed by Ilya Leoshkevich

Fix EQ_ATTR_ALT size calculation (PR bootstrap/87417)

"r264537: Change EQ_ATTR_ALT to support up to 64 alternatives" changed
the format of EQ_ATTR_ALT from ii to ww.  This broke the bootstrap on
32-bit systems, because the formula for rtx_code_size assumed that only
certain codes contain HOST_WIDE_INTs.  This did not surface on 64-bit
systems, because rtunion is 8 bytes anyway, but on 32-bit systems it's
only 4 bytes.  This resulted in out-of-bounds writes and memory
corruptions in genattrtab.

gcc/ChangeLog:

2018-09-25  Ilya Leoshkevich  <iii@linux.ibm.com>

	PR bootstrap/87417
	* rtl.c (rtx_code_size): Take into account that EQ_ATTR_ALT
	contains HOST_WIDE_INTs when computing its size.

From-SVN: r264556
parent 75902396
2018-09-25 Ilya Leoshkevich <iii@linux.ibm.com>
PR bootstrap/87417
* rtl.c (rtx_code_size): Take into account that EQ_ATTR_ALT
contains HOST_WIDE_INTs when computing its size.
2018-09-24 Jim Wilson <jimw@sifive.com>
PR target/87391
......
......@@ -110,8 +110,7 @@ const enum rtx_class rtx_class[NUM_RTX_CODE] = {
const unsigned char rtx_code_size[NUM_RTX_CODE] = {
#define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) \
(((ENUM) == CONST_INT || (ENUM) == CONST_DOUBLE \
|| (ENUM) == CONST_FIXED || (ENUM) == CONST_WIDE_INT) \
((FORMAT)[0] == 'w' \
? RTX_HDR_SIZE + (sizeof FORMAT - 1) * sizeof (HOST_WIDE_INT) \
: (ENUM) == REG \
? RTX_HDR_SIZE + sizeof (reg_info) \
......
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