re PR target/81616 (Update -mtune=generic for the current Intel and AMD processors)

	PR target/81616
	* config/i386/x86-tune-costs.h: Increase cost of integer load costs
	for generic 4->6.

From-SVN: r256073

gcc/ChangeLog

 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
 
 	PR target/81616
+	* config/i386/x86-tune-costs.h: Increase cost of integer load costs
+	for generic 4->6.
+
+2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
+
+	PR target/81616
+	Generic tuning.
 	* x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
 	cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
 	and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase

gcc/config/i386/x86-tune-costs.h

@@ -2259,8 +2259,8 @@ struct processor_costs generic_cost = {
 
   /* All move costs are relative to integer->integer move times 2 and thus
      they are latency*2. */
-  4,				     /* cost for loading QImode using movzbl */
-  {4, 4, 4},				/* cost of loading integer registers
+  6,				     /* cost for loading QImode using movzbl */
+  {6, 6, 6},				/* cost of loading integer registers
 					   in QImode, HImode and SImode.
 					   Relative to reg-reg move (2).  */
   {6, 6, 6},				/* cost of storing integer registers */