gcc.target/cris/dbr-1.c: New test.
Random spotting. Exposes the missed benefit for delay-slot filling of a splitter for indexed addressing mode (the [rN+M] one). To be considered for common instructions and perhaps only for suitable M; at least +-63 is obvious (when there's a register available) as both the original and the add fit in delay-slots.
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gcc/testsuite/gcc.target/cris/dbr-1.c
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