*** empty log message ***

From-SVN: r472

gcc/c-aux-info.c

@@ -30,6 +30,10 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
 #include "tree.h"
 #include "c-tree.h"
 
+#ifndef errno
+extern int errno;
+#endif
+
 extern char* xmalloc ();
 
 enum formals_style_enum {
@@ -231,7 +235,7 @@ gen_formal_list_for_type (fntype, style)
      more typing information (for the parameter list) should be added (by
      hand) at some convenient moment.
 
-     The string chozen here is a comment with question marks in it.  */
+     The string chosen here is a comment with question marks in it.  */
 
   if (!*formal_list)
     {
@@ -636,7 +640,7 @@ gen_aux_info_record (fndecl, is_definition, is_implicit, is_prototyped)
 	    fprintf (aux_info_file, "/* compiled from: %s */\n", wd);
 	}
 
-      /* Write the actual line of auxilliary info.  */
+      /* Write the actual line of auxiliary info.  */
 
       fprintf (aux_info_file, "/* %s:%d:%c%c */ %s;",
 	       DECL_SOURCE_FILE (fndecl),

gcc/c-lex.c

-/* Lexical analyser for C and Objective C.
+/* Lexical analyzer for C and Objective C.
    Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
 
 This file is part of GNU CC.
@@ -152,11 +152,11 @@ is_reserved_word (str, len)
   static struct resword wordlist[] =
     {
       {"",}, {"",}, {"",}, {"",}, {"",}, {"",}, {"",}, 
-      {"asm",  ASM, NORID},
+      {"asm",  ASM_KEYWORD, NORID},
       {"",}, 
-      {"__asm",  ASM, NORID},
+      {"__asm",  ASM_KEYWORD, NORID},
       {"",}, 
-      {"__asm__",  ASM, NORID},
+      {"__asm__",  ASM_KEYWORD, NORID},
       {"break",  BREAK, NORID},
       {"__typeof__",  TYPEOF, NORID},
       {"",}, 
@@ -1084,7 +1084,7 @@ yylex ()
 
 	    /* Even if we decided to recognize asm, still perhaps warn.  */
 	    if (pedantic
-		&& (value == ASM || value == TYPEOF
+		&& (value == ASM_KEYWORD || value == TYPEOF
 		    || ptr->rid == RID_INLINE)
 		&& token_buffer[0] != '_')
 	      pedwarn ("ANSI does not permit the keyword `%s'",
@@ -1934,7 +1934,7 @@ done:
   return value;
 }
 
-/* Sets the value of the 'yydebug' varable to VALUE.
+/* Sets the value of the 'yydebug' variable to VALUE.
    This is a function so we don't have to have YYDEBUG defined
    in order to build the compiler.  */
 

gcc/calls.c

@@ -508,7 +508,8 @@ expand_call (exp, target, ignore, modifier)
 	      mark_addressable (fndecl);
 	    }
 
-	  if (TREE_READONLY (fndecl) && ! TREE_THIS_VOLATILE (fndecl))
+	  if (TREE_READONLY (fndecl) && ! TREE_THIS_VOLATILE (fndecl)
+	      && TYPE_MODE (TREE_TYPE (exp)) != VOIDmode)
 	    is_const = 1;
 	}
     }
@@ -717,7 +718,7 @@ expand_call (exp, target, ignore, modifier)
      If SETUP_INCOMING_VARARGS is defined, this machine will be able to
      place unnamed args that were passed in registers into the stack.  So
      treat all args as named.  This allows the insns emitting for a specific
-     argument list to be independant of the function declaration.
+     argument list to be independent of the function declaration.
 
      If SETUP_INCOMING_VARARGS is not defined, we do not have any reliable
      way to pass unnamed args in registers, so we must force them into
@@ -1620,7 +1621,7 @@ target_for_arg (type, size, args_addr, offset)
    *ARG describes the argument value and where to pass it.
 
    ARGBLOCK is the address of the stack-block for all the arguments,
-   or 0 on a machine where arguemnts are pushed individually.
+   or 0 on a machine where arguments are pushed individually.
 
    MAY_BE_ALLOCA nonzero says this could be a call to `alloca'
    so must be careful about how the stack is used. 

gcc/cse.c

@@ -96,7 +96,7 @@ Constants and quantity numbers
    in the appropriate element of qty_const.  This is in addition to
    putting the constant in the hash table as is usual for non-regs.
 
-   Whether a reg or a constant is prefered is determined by the configuration
+   Whether a reg or a constant is preferred is determined by the configuration
    macro CONST_COSTS and will often depend on the constant value.  In any
    event, expressions containing constants can be simplified, by fold_rtx.
 
@@ -323,7 +323,7 @@ static int cse_basic_block_start;
 static int cse_basic_block_end;
 
 /* Vector mapping INSN_UIDs to cuids.
-   The cuids are like uids but increase monononically always.
+   The cuids are like uids but increase monotonically always.
    We use them to see whether a reg is used outside a given basic block.  */
 
 static short *uid_cuid;
@@ -2754,6 +2754,9 @@ simplify_unary_operation (code, mode, op, op_mode)
 	    return 0;
 	  break;
 
+	case SQRT:
+	  return 0;
+
 	default:
 	  abort ();
 	}
@@ -2814,6 +2817,9 @@ simplify_unary_operation (code, mode, op, op_mode)
 	    return 0;
 	  break;
 
+	case SQRT:
+	  return 0;
+
 	default:
 	  return 0;
 	}
@@ -2866,6 +2872,9 @@ simplify_unary_operation (code, mode, op, op_mode)
 	  d = (double) REAL_VALUE_UNSIGNED_FIX_TRUNCATE (d);
 	  break;
 
+	case SQRT:
+	  return 0;
+
 	default:
 	  abort ();
 	}
@@ -5504,6 +5513,49 @@ cse_insn (insn, in_libcall_block)
 	    }
         }
 
+      /* Another possibility is that we have an AND with a constant in
+	 a mode narrower than a word.  If so, it might have been generated
+	 as part of an "if" which would narrow the AND.  If we already
+	 have done the AND in a wider mode, we can use a SUBREG of that
+	 value.  */
+
+      if (flag_expensive_optimizations && ! src_related
+	  && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
+	  && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
+	{
+	  enum machine_mode tmode;
+	  rtx new_and = gen_rtx (AND, VOIDmode, 0, XEXP (src, 1));
+
+	  for (tmode = GET_MODE_WIDER_MODE (mode);
+	       GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
+	       tmode = GET_MODE_WIDER_MODE (tmode))
+	    {
+	      rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
+	      struct table_elt *larger_elt;
+
+	      if (inner)
+		{
+		  PUT_MODE (new_and, tmode);
+		  XEXP (new_and, 0) = inner;
+		  larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
+		  if (larger_elt == 0)
+		    continue;
+
+		  for (larger_elt = larger_elt->first_same_value;
+		       larger_elt; larger_elt = larger_elt->next_same_value)
+		    if (GET_CODE (larger_elt->exp) == REG)
+		      {
+			src_related
+			  = gen_lowpart_if_possible (mode, larger_elt->exp);
+			break;
+		      }
+
+		  if (src_related)
+		    break;
+		}
+	    }
+	}
+		  
       if (src == src_folded)
         src_folded = 0;
 
@@ -5734,7 +5786,7 @@ cse_insn (insn, in_libcall_block)
       /* If this is a single SET, we are setting a register, and we have an
 	 equivalent constant, we want to add a REG_NOTE.   We don't want
 	 to write a REG_EQUAL note for a constant pseudo since verifying that
-	 that psuedo hasn't been eliminated is a pain.  Such a note also
+	 that pseudo hasn't been eliminated is a pain.  Such a note also
 	 won't help anything.  */
       if (n_sets == 1 && src_const && GET_CODE (dest) == REG
 	  && GET_CODE (src_const) != REG)
@@ -6761,7 +6813,7 @@ cse_end_of_basic_block (insn, data, follow_jumps, after_loop)
       /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
 	 was specified, we haven't reached our maximum path length, there are
 	 insns following the target of the jump, this is the only use of the
-	 jump label, and the target label is preceeded by a BARRIER.  */
+	 jump label, and the target label is preceded by a BARRIER.  */
       else if (follow_jumps && path_size < PATHLENGTH - 1
 	       && GET_CODE (p) == JUMP_INSN
       	       && GET_CODE (PATTERN (p)) == SET
@@ -7115,7 +7167,7 @@ cse_basic_block (from, to, next_branch, around_loop)
 
       /* See if it is ok to keep on going past the label
 	 which used to end our basic block.  Remember that we incremented
-	 the count of that label, so we decremement it here.  If we made
+	 the count of that label, so we decrement it here.  If we made
 	 a jump unconditional, TO_USAGE will be one; in that case, we don't
 	 want to count the use in that jump.  */
 
@@ -7132,7 +7184,7 @@ cse_basic_block (from, to, next_branch, around_loop)
 	  /* Find the end of the following block.  Note that we won't be
 	     following branches in this case.  If TO was the last insn
 	     in the function, we are done.  Similarly, if we deleted the
-	     insn after TO, it must have been because it was preceeded by
+	     insn after TO, it must have been because it was preceded by
 	     a BARRIER.  In that case, we are done with this block because it
 	     has no continuation.  */
 
@@ -7266,6 +7318,7 @@ delete_dead_from_cse (insns, nreg)
 {
   int *counts = (int *) alloca (nreg * sizeof (int));
   rtx insn;
+  rtx tem;
   int i;
 
   /* First count the number of times each register is used.  */
@@ -7287,6 +7340,14 @@ delete_dead_from_cse (insns, nreg)
 	      && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
 	    ;
 
+#ifdef HAVE_cc0
+	  else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
+		   && ! side_effects_p (SET_SRC (PATTERN (insn)))
+		   && ((tem = next_nonnote_insn (insn)) == 0
+		       || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
+		       || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
+	    ;
+#endif
 	  else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
 		   || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
 		   || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
@@ -7304,6 +7365,14 @@ delete_dead_from_cse (insns, nreg)
 		    && SET_DEST (elt) == SET_SRC (elt))
 		  ;
 
+#ifdef HAVE_cc0
+		else if (GET_CODE (SET_DEST (elt)) == CC0
+			 && ! side_effects_p (SET_SRC (elt))
+			 && ((tem = next_nonnote_insn (insn)) == 0
+			     || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
+			     || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
+		  ;
+#endif
 		else if (GET_CODE (SET_DEST (elt)) != REG
 			 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
 			 || counts[REGNO (SET_DEST (elt))] != 0

gcc/flags.h

@@ -25,7 +25,8 @@ enum debug_info_type
   NO_DEBUG,	    /* Write no debug info.  */
   DBX_DEBUG,	    /* Write BSD .stabs for DBX (using dbxout.c).  */
   SDB_DEBUG,	    /* Write COFF for (old) SDB (using sdbout.c).  */
-  DWARF_DEBUG	    /* Write Dwarf debug info (using dwarfout.c).  */
+  DWARF_DEBUG,	    /* Write Dwarf debug info (using dwarfout.c).  */
+  XCOFF_DEBUG	    /* Write IBM/Xcoff debug info (using dbxout.c).  */
 };
 
 /* Specify which kind of debugging info to generate.  */
@@ -42,7 +43,7 @@ enum debug_info_level
 /* Specify how much debugging info to generate.  */
 extern enum debug_info_level debug_info_level;
 
-#ifdef DBX_DEBUGGING_INFO
+#if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
 /* Nonzero means use GDB-only extensions of DBX format.  */
 extern int use_gdb_dbx_extensions;
 #endif
@@ -242,7 +243,7 @@ extern int flag_no_inline;
 
 extern int flag_syntax_only;
 
-/* Nonzero means we should save auxilliary info into a .X file.  */
+/* Nonzero means we should save auxiliary info into a .X file.  */
 
 extern int flag_gen_aux_info;
 

gcc/genattrtab.c

@@ -586,7 +586,7 @@ attr_string (str, len)
   /* Search the table for the string.  */
   for (h = attr_hash_table[hashcode % RTL_HASH_SIZE]; h; h = h->next)
     if (h->hashcode == -hashcode
-	&& !strcmp (h->u.str, str))
+	&& !strncmp (h->u.str, str, len))
       return h->u.str;			/* <-- return if found.  */
 
   /* Not found; create a permanent copy and add it to the hash table.  */
@@ -2191,7 +2191,7 @@ simplify_test_exp (exp, insn_code, insn_index)
 
       /* If either side is an IOR and we have (eq_attr "alternative" ..")
 	 present on both sides, apply the distributive law since this will
-	 yield simplications.  */
+	 yield simplifications.  */
       if ((GET_CODE (left) == IOR || GET_CODE (right) == IOR)
 	  && compute_alternative_mask (left, IOR)
 	  && compute_alternative_mask (right, IOR))

gcc/global.c

@@ -542,7 +542,7 @@ global_alloc (file)
 	 for the sake of debugging information.  */
   if (n_basic_blocks > 0)
 #endif
-    reload (basic_block_head[0], 1, file);
+    reload (get_insns (), 1, file);
 }
 
 /* Sort predicate for ordering the allocnos.
@@ -778,7 +778,7 @@ prune_preferences ()
   /* Scan least most important to most important.
      For each allocno, remove from preferences registers that cannot be used,
      either because of conflicts or register type.  Then compute all registers
-     prefered by each lower-priority register that conflicts.  */
+     preferred by each lower-priority register that conflicts.  */
 
   for (i = max_allocno - 1; i >= 0; i--)
     {
@@ -875,7 +875,7 @@ find_reg (allocno, losers, all_regs_p, accept_call_clobbered, retrying)
   IOR_HARD_REG_SET (used1, hard_reg_conflicts[allocno]);
 
   /* Try each hard reg to see if it fits.  Do this in two passes.
-     In the first pass, skip registers that are prefered by some other pseudo
+     In the first pass, skip registers that are preferred by some other pseudo
      to give it a better chance of getting one of those registers.  Only if
      we can't get a register when excluding those do we take one of them.
      However, we never allocate a register for the first time in pass 0.  */

gcc/integrate.c

@@ -508,6 +508,7 @@ save_for_inline_copying (fndecl)
 
 	case CODE_LABEL:
 	  copy = label_map[CODE_LABEL_NUMBER (insn)];
+	  LABEL_NAME (copy) = LABEL_NAME (insn);
 	  break;
 
 	case BARRIER:
@@ -2101,7 +2102,7 @@ try_constants (insn, map)
 
 /* Substitute known constants for pseudo regs in the contents of LOC,
    which are part of INSN.
-   If INSN is zero, the substition should always be done (this is used to
+   If INSN is zero, the substitution should always be done (this is used to
    update DECL_RTL).
    These changes are taken out by try_constants if the result is not valid.
 

gcc/jump.c

@@ -640,7 +640,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
 	      continue;
 	    }
 
-	  /* If we have an unconditional jump preceeded by a USE, try to put
+	  /* If we have an unconditional jump preceded by a USE, try to put
 	     the USE before the target and jump there.  This simplifies many
 	     of the optimizations below since we don't have to worry about
 	     dealing with these USE insns.  We only do this if the label
@@ -690,7 +690,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
 
 	     We set:
 
-	     TEMP to the jump insn preceeding "x = a;"
+	     TEMP to the jump insn preceding "x = a;"
 	     TEMP1 to X
 	     TEMP2 to the insn that sets "x = b;"
 	     TEMP3 to the insn that sets "x = a;"  */
@@ -1418,11 +1418,13 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan)
 
 			/* Include in each range any line number before it.  */
 			while (PREV_INSN (range1beg)
-			       && GET_CODE (PREV_INSN (range1beg)) == NOTE)
+			       && GET_CODE (PREV_INSN (range1beg)) == NOTE
+			       && NOTE_LINE_NUMBER (PREV_INSN (range1beg)) > 0)
 			  range1beg = PREV_INSN (range1beg);
 
 			while (PREV_INSN (range2beg)
-			       && GET_CODE (PREV_INSN (range2beg)) == NOTE)
+			       && GET_CODE (PREV_INSN (range2beg)) == NOTE
+			       && NOTE_LINE_NUMBER (PREV_INSN (range2beg)) > 0)
 			  range2beg = PREV_INSN (range2beg);
 
 			/* Don't move NOTEs for blocks or loops; shift them

gcc/local-alloc.c

@@ -368,7 +368,7 @@ local_alloc ()
   update_equiv_regs ();
 
   /* This sets the maximum number of quantities we can have.  Quantity
-     numbers start at zero and we can have one for each psuedo plus the
+     numbers start at zero and we can have one for each pseudo plus the
      number of SCRATCHs in the largest block, in the worst case.  */
   max_qty = (max_regno - FIRST_PSEUDO_REGISTER) + max_scratch;
 
@@ -640,7 +640,7 @@ memref_used_between_p (memref, start, end)
    register-register copy.  */
 
 static void
-optimize_reg_copy (insn, dest, src)
+optimize_reg_copy_1 (insn, dest, src)
      rtx insn;
      rtx dest;
      rtx src;
@@ -755,6 +755,85 @@ optimize_reg_copy (insn, dest, src)
 	}
     }
 }
+
+/* INSN is a copy of SRC to DEST, in which SRC dies.  See if we now have
+   a sequence of insns that modify DEST followed by an insn that sets
+   SRC to DEST in which DEST dies, with no prior modification of DEST.
+   (There is no need to check if the insns in between actually modify
+   DEST.  We should not have cases where DEST is not modified, but
+   the optimization is safe if no such modification is detected.)
+   In that case, we can replace all uses of DEST, starting with INSN and
+   ending with the set of SRC to DEST, with SRC.  We do not do this
+   optimization if a CALL_INSN is crossed unless SRC already crosses a
+   call.
+
+   It is assumed that DEST and SRC are pseudos; it is too complicated to do
+   this for hard registers since the substitutions we may make might fail.  */
+
+static void
+optimize_reg_copy_2 (insn, dest, src)
+     rtx insn;
+     rtx dest;
+     rtx src;
+{
+  rtx p, q;
+  rtx set;
+  int sregno = REGNO (src);
+  int dregno = REGNO (dest);
+
+  for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
+    {
+      if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
+	  || (GET_CODE (p) == NOTE
+	      && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
+		  || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
+	break;
+
+      if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
+	continue;
+
+      set = single_set (p);
+      if (set && SET_SRC (set) == dest && SET_DEST (set) == src
+	  && find_reg_note (p, REG_DEAD, dest))
+	{
+	  /* We can do the optimization.  Scan forward from INSN again,
+	     replacing regs as we go.  */
+
+	  /* Set to stop at next insn.  */
+	  for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
+	    if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
+	      {
+		if (reg_mentioned_p (dest, PATTERN (q)))
+		  {
+		    PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
+
+		    /* We assume that a register is used exactly once per
+		       insn in the updates below.  If this is not correct,
+		       no great harm is done.  */
+		    reg_n_refs[sregno] -= loop_depth;
+		    reg_n_refs[dregno] += loop_depth;
+		  }
+
+
+	      if (GET_CODE (q) == CALL_INSN)
+		{
+		  reg_n_calls_crossed[dregno]--;
+		  reg_n_calls_crossed[sregno]++;
+		}
+	      }
+
+	  remove_note (p, find_reg_note (p, REG_DEAD, dest));
+	  reg_n_deaths[dregno]--;
+	  remove_note (insn, find_reg_note (insn, REG_DEAD, src));
+	  reg_n_deaths[sregno]--;
+	  return;
+	}
+
+      if (reg_set_p (src, p)
+	  || (GET_CODE (p) == CALL_INSN && reg_n_calls_crossed[sregno] == 0))
+	break;
+    }
+}
 	      
 /* Find registers that are equivalent to a single value throughout the
    compilation (either because they can be referenced in memory or are set once
@@ -825,7 +904,15 @@ update_equiv_regs ()
       if (flag_expensive_optimizations && GET_CODE (dest) == REG
 	  && GET_CODE (SET_SRC (set)) == REG
 	  && ! find_reg_note (insn, REG_DEAD, SET_SRC (set)))
-	optimize_reg_copy (insn, dest, SET_SRC (set));
+	optimize_reg_copy_1 (insn, dest, SET_SRC (set));
+
+      /* Similarly for a pseudo-pseudo copy when SRC is dead.  */
+      else if (flag_expensive_optimizations && GET_CODE (dest) == REG
+	       && REGNO (dest) >= FIRST_PSEUDO_REGISTER
+	       && GET_CODE (SET_SRC (set)) == REG
+	       && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER
+	       && find_reg_note (insn, REG_DEAD, SET_SRC (set)))
+	optimize_reg_copy_2 (insn, dest, SET_SRC (set));
 
       /* Otherwise, we only handle the case of a pseudo register being set
 	 once.  */

gcc/loop.c

@@ -48,7 +48,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
 #include "loop.h"
 
 /* Vector mapping INSN_UIDs to luids.
-   The luids are like uids but increase monononically always.
+   The luids are like uids but increase monotonically always.
    We use them to see whether a jump comes from outside a given loop.  */
 
 int *uid_luid;
@@ -603,8 +603,7 @@ scan_loop (loop_start, end, nregs)
     }
 
   /* Scan through the loop finding insns that are safe to move.
-     In each such insn, store QImode as the mode, to mark it.
-     Then set n_times_set negative for the reg being set, so that
+     Set n_times_set negative for the reg being set, so that
      this reg will be considered invariant for subsequent insns.
      We consider whether subsequent insns use the reg
      in deciding whether it is worth actually moving.
@@ -3276,7 +3275,7 @@ strength_reduce (scan_start, end, loop_top, insn_count,
       else
 	{
 	  /* Biv initial value is not simple move,
-	     so let it keep intial value of "itself".  */
+	     so let it keep initial value of "itself".  */
 
 	  if (loop_dump_stream)
 	    fprintf (loop_dump_stream, "is complex\n");
@@ -3756,7 +3755,7 @@ strength_reduce (scan_start, end, loop_top, insn_count,
 	 This won't work if ! all_reduced,
 	 since the givs we planned to use might not have been reduced.
 
-	 We have to be careful that we didn't initially think we could elminate
+	 We have to be careful that we didn't initially think we could eliminate
 	 this biv because of a giv that we now think may be dead and shouldn't
 	 be used as a biv replacement.  
 
@@ -3863,7 +3862,7 @@ valid_initial_value_p (x, insn, call_seen, loop_start)
   if (CONSTANT_P (x))
     return 1;
 
-  /* Only consider psuedos we know about initialized in insns whose luids
+  /* Only consider pseudos we know about initialized in insns whose luids
      we know.  */
   if (GET_CODE (x) != REG
       || REGNO (x) >= max_reg_before_loop)
@@ -4106,7 +4105,7 @@ record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
      isn't computable if INSN insn't executed every iteration.
      However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
      it does not compute a new value.  Hence the value is always computable
-     irregardless of whether INSN is executed each iteration.  */
+     regardless of whether INSN is executed each iteration.  */
 
   if (type == DEST_ADDR)
     v->always_computable = 1;
@@ -5818,7 +5817,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
 	     Insert insns to calculate new compare value.  */
 
 	  for (v = bl->giv; v; v = v->next_iv)
-	    if (CONSTANT_P (v->mult_val)
+	    if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
 		&& ! v->ignore && ! v->maybe_dead
 		&& v->mode == mode)
 	      {

gcc/optabs.c

@@ -71,6 +71,7 @@ optab neg_optab;
 optab abs_optab;
 optab one_cmpl_optab;
 optab ffs_optab;
+optab sqrt_optab;
 
 optab cmp_optab;
 optab ucmp_optab;  /* Used only for libcalls for unsigned comparisons.  */
@@ -1183,7 +1184,7 @@ emit_unop_insn (icode, target, op0, code)
 /* Emit code to perform a series of operations on a multi-word quantity, one
    word at a time.
 
-   Such a block is preceeded by a CLOBBER of the output, consists of multiple
+   Such a block is preceded by a CLOBBER of the output, consists of multiple
    insns, each setting one word of the output, and followed by a SET copying
    the output to itself.
 
@@ -2829,6 +2830,7 @@ init_optabs ()
   abs_optab = init_optab (ABS);
   one_cmpl_optab = init_optab (NOT);
   ffs_optab = init_optab (FFS);
+  sqrt_optab = init_optab (SQRT);
 
 #ifdef HAVE_addqi3
   if (HAVE_addqi3)
@@ -3675,6 +3677,45 @@ init_optabs ()
   /* No library calls here!  If there is no abs instruction,
      expand_expr will generate a conditional negation.  */
 
+#ifdef HAVE_sqrtqi2
+  if (HAVE_sqrtqi2)
+    sqrt_optab->handlers[(int) QImode].insn_code = CODE_FOR_sqrtqi2;
+#endif
+#ifdef HAVE_sqrthi2
+  if (HAVE_sqrthi2)
+    sqrt_optab->handlers[(int) HImode].insn_code = CODE_FOR_sqrthi2;
+#endif
+#ifdef HAVE_sqrtpsi2
+  if (HAVE_sqrtpsi2)
+    sqrt_optab->handlers[(int) PSImode].insn_code = CODE_FOR_sqrtpsi2;
+#endif
+#ifdef HAVE_sqrtsi2
+  if (HAVE_sqrtsi2)
+    sqrt_optab->handlers[(int) SImode].insn_code = CODE_FOR_sqrtsi2;
+#endif
+#ifdef HAVE_sqrtdi2
+  if (HAVE_sqrtdi2)
+    sqrt_optab->handlers[(int) DImode].insn_code = CODE_FOR_sqrtdi2;
+#endif
+#ifdef HAVE_sqrtti2
+  if (HAVE_sqrtti2)
+    sqrt_optab->handlers[(int) TImode].insn_code = CODE_FOR_sqrtti2;
+#endif
+#ifdef HAVE_sqrtsf2
+  if (HAVE_sqrtsf2)
+    sqrt_optab->handlers[(int) SFmode].insn_code = CODE_FOR_sqrtsf2;
+#endif
+#ifdef HAVE_sqrtdf2
+  if (HAVE_sqrtdf2)
+    sqrt_optab->handlers[(int) DFmode].insn_code = CODE_FOR_sqrtdf2;
+#endif
+#ifdef HAVE_sqrttf2
+  if (HAVE_sqrttf2)
+    sqrt_optab->handlers[(int) TFmode].insn_code = CODE_FOR_sqrttf2;
+#endif
+  /* No library calls here!  If there is no sqrt instruction expand_builtin
+     should force the library call.  */
+
 #ifdef HAVE_one_cmplqi2
   if (HAVE_one_cmplqi2)
     one_cmpl_optab->handlers[(int) QImode].insn_code = CODE_FOR_one_cmplqi2;

gcc/protoize.c

@@ -1207,11 +1207,11 @@ abspath (cwd, rel_filename)
   /* Setup the current working directory as needed.  */
   const char *cwd2 = (cwd) ? cwd : cwd_buffer;
   char *const abs_buffer
-    = (char *) alloca (strlen (cwd2) + strlen (rel_filename) + 1);
+    = (char *) alloca (strlen (cwd2) + strlen (rel_filename) + 2);
   char *endp = abs_buffer;
   char *outp, *inp;
 
-  /* Copy the  filename (possibly preceeded by the current working
+  /* Copy the  filename (possibly preceded by the current working
      directory name) into the absolutization buffer.  */
 
   {
@@ -1501,7 +1501,7 @@ referenced_file_is_newer (l, aux_info_mtime)
    a function definition or declaration.
 
    Link this record onto the list of such records for the particular file in
-   which it occured in proper (descending) line number order (for now).
+   which it occurred in proper (descending) line number order (for now).
 
    If there is an identical record already on the list for the file, throw
    this one away.  Doing so takes care of the (useless and troublesome)
@@ -1678,7 +1678,7 @@ save_def_or_dec (l, is_syscalls)
          character of the name of the function that was declared/defined.
          If p points to another right paren, then this indicates that we
          are dealing with multiple formals lists.  In that case, there
-         really should be another right paren preceeding this right paren.  */
+         really should be another right paren preceding this right paren.  */
 
       if (*p != ')')
         break;
@@ -2580,7 +2580,7 @@ connect_defs_and_decs (hp)
      prototypes *should* all match exactly with one another and with the
      prototype for the actual function definition.  We don't check for this
      here however, since we assume that the compiler must have already done
-     this consistancy checking when it was creating the .X files.  */
+     this consistency checking when it was creating the .X files.  */
 
   for (dd_p = hp->ddip; dd_p; dd_p = dd_p->next_for_func)
     if (dd_p->prototyped)
@@ -3418,7 +3418,7 @@ add_local_decl (def_dec_p, clean_text_p)
       output_string (decl);
     }
 
-    /* Finally, write out a new indent string, just like the preceeding one
+    /* Finally, write out a new indent string, just like the preceding one
        that we found.  This will typically include a newline as the first
        character of the indent string.  */
 

gcc/reg-stack.c

@@ -241,10 +241,9 @@ static void change_stack ();
 static void convert_regs ();
 static void dump_stack_info ();
 
-/* Return non-zero if any stack register is mentioned somewhere within
-   PAT. */
+/* Return non-zero if any stack register is mentioned somewhere within PAT.  */
 
-static int
+int
 stack_regs_mentioned_p (pat)
      register rtx pat;
 {
@@ -1450,7 +1449,7 @@ stack_reg_life_analysis (first)
 }
 
 /*****************************************************************************
-   This section deals with stack register substition, and forms the second
+   This section deals with stack register substitution, and forms the second
    pass over the RTL.
  *****************************************************************************/
 
@@ -2623,7 +2622,7 @@ goto_block_pat (insn, regstack, pat)
 }
 
 /* Traverse all basic blocks in a function, converting the register
-   refereces in each insn from the "flat" register file that gcc uses, to
+   references in each insn from the "flat" register file that gcc uses, to
    the stack-like registers the 387 uses. */
 
 static void

gcc/reload.c

@@ -284,6 +284,16 @@ find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
   enum machine_mode t_mode = VOIDmode;
   enum insn_code t_icode = CODE_FOR_nothing;
 
+  /* If X is a pseudo-register that has an equivalent MEM (actually, if it
+     is still a pseudo-register by now, it *must* have an equivalent MEM
+     but we don't want to assume that), use that equivalent when seeing if
+     a secondary reload is needed since whether or not a reload is needed
+     might be sensitive to the form of the MEM.  */
+
+  if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
+      && reg_equiv_mem[REGNO (x)] != 0)
+    x = reg_equiv_mem[REGNO (x)];
+
 #ifdef SECONDARY_INPUT_RELOAD_CLASS
   if (in_p)
     class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
@@ -323,8 +333,10 @@ find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
 	 in operand 1.  Outputs should have an initial "=", which we must
 	 skip.  */
 
+      char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
       enum reg_class insn_class
-	= REG_CLASS_FROM_LETTER (insn_operand_constraint[(int) icode][!in_p][in_p]);
+	= (insn_letter == 'r' ? GENERAL_REGS
+	   : REG_CLASS_FROM_LETTER (insn_letter));
 
       if (insn_class == NO_REGS
 	  || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
@@ -337,10 +349,11 @@ find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
 	mode = insn_operand_mode[(int) icode][2];
       else
 	{
+	  char t_letter = insn_operand_constraint[(int) icode][2][2];
 	  class = insn_class;
 	  t_mode = insn_operand_mode[(int) icode][2];
-	  t_class
-	    = REG_CLASS_FROM_LETTER (insn_operand_constraint[(int) icode][2][2]);
+	  t_class = (t_letter == 'r' ? GENERAL_REGS
+		     : REG_CLASS_FROM_LETTER (t_letter));
 	  t_icode = icode;
 	  icode = CODE_FOR_nothing;
 	}
@@ -1831,7 +1844,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	      bcopy (constraints, constraints1, noperands * sizeof (char *));
 	      n_alternatives = n_occurrences (',', constraints[0]) + 1;
 	      for (i = 1; i < noperands; i++)
-		if (n_alternatives != n_occurrences (',', constraints[0]) + 1)
+		if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
 		  {
 		    error_for_asm (insn, "operand constraints differ in number of alternatives");
 		    /* Avoid further trouble with this insn.  */
@@ -2012,6 +2025,11 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 				    &XEXP (recog_operand[i], 0),
 				    recog_operand[i], ind_levels);
 	      substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
+
+	      /* This is no longer a psuedo register.  To prevent later code
+		 from thinking it still is, we must reset the preferred_class
+		 to NO_REGS.  */
+	      preferred_class[i] = NO_REGS;
 	    }
 	}
     }
@@ -3403,7 +3421,7 @@ find_reloads_address (mode, memrefloc, ad, loc, operand, ind_levels)
      is that it is itself a MEM.  This can happen when the frame pointer is
      being eliminated, a pseudo is not allocated to a hard register, and the
      offset between the frame and stack pointers is not its initial value.
-     In that case the psuedo will have been replaced by a MEM referring to
+     In that case the pseudo will have been replaced by a MEM referring to
      the stack pointer.  */
   if (GET_CODE (ad) == MEM)
     {

gcc/reload1.c

@@ -236,7 +236,7 @@ int reload_in_progress = 0;
 enum insn_code reload_in_optab[NUM_MACHINE_MODES];
 enum insn_code reload_out_optab[NUM_MACHINE_MODES];
 
-/* This obstack is used for allocation of rtl during register elmination.
+/* This obstack is used for allocation of rtl during register elimination.
    The allocated storage can be freed once find_reloads has processed the
    insn.  */
 
@@ -744,7 +744,7 @@ reload (first, global, dumpfile)
   /* This loop scans the entire function each go-round
      and repeats until one repetition spills no additional hard regs.  */
 
-  /* This flag is set when a psuedo reg is spilled,
+  /* This flag is set when a pseudo reg is spilled,
      to require another pass.  Note that getting an additional reload
      reg does not necessarily imply any pseudo reg was spilled;
      sometimes we find a reload reg that no pseudo reg was allocated in.  */
@@ -880,7 +880,7 @@ reload (first, global, dumpfile)
 	      }
 	  }
 
-      /* If we allocated another psuedo to the stack, redo elimination
+      /* If we allocated another pseudo to the stack, redo elimination
 	 bookkeeping.  */
       if (something_changed)
 	continue;
@@ -1188,7 +1188,7 @@ reload (first, global, dumpfile)
 		 of that class should be quite rare.
 
 		 If a group is needed, the size and mode of the group will
-		 have been set up at the begining of this loop.  */
+		 have been set up at the beginning of this loop.  */
 
 	      if (GET_CODE (insn) == CALL_INSN
 		  && caller_save_spill_class != NO_REGS)
@@ -2171,7 +2171,7 @@ set_label_offsets (x, insn, initial_p)
 	}
 
       /* Otherwise, if this is the definition of a label and it is
-	 preceeded by a BARRIER, set our offsets to the known offset of
+	 preceded by a BARRIER, set our offsets to the known offset of
 	 that label.  */
 
       else if (x == insn
@@ -2579,7 +2579,7 @@ eliminate_regs (x, mem_mode, insn)
 
     case CLOBBER:
       /* If clobbering a register that is the replacement register for an
-	 elimination we still think can be peformed, note that it cannot
+	 elimination we still think can be performed, note that it cannot
 	 be performed.  Otherwise, we need not be concerned about it.  */
       for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
 	if (ep->to_rtx == XEXP (x, 0))
@@ -4324,8 +4324,8 @@ choose_reload_regs (insn, avoid_return_reg)
 	    {
 	      int s = reload_order[i];
 
-	      if ((reload_in[s] == 0 && reload_out[s] == 0 &&
-		   ! reload_secondary_p[s])
+	      if ((reload_in[s] == 0 && reload_out[s] == 0
+		   && ! reload_secondary_p[s])
 		  || reload_optional[s])
 		continue;
 
@@ -4479,7 +4479,7 @@ emit_reload_insns (insn)
   /* Values to be put in spill_reg_store are put here first.  */
   rtx new_spill_reg_store[FIRST_PSEUDO_REGISTER];
 
-  /* If this is a CALL_INSN preceeded by USE insns, any reload insns
+  /* If this is a CALL_INSN preceded by USE insns, any reload insns
      must go in front of the first USE insn, not in front of INSN.  */
 
   if (GET_CODE (insn) == CALL_INSN && GET_CODE (PREV_INSN (insn)) == INSN
@@ -5637,9 +5637,9 @@ inc_for_reload (reloadreg, value, inc_amount, insn)
     {
       /* If incrementing a register, assume we can
 	 output an insn to increment it directly.  */
-      if (GET_CODE (incloc) == REG &&
-	  (REGNO (incloc) < FIRST_PSEUDO_REGISTER
-	   || reg_renumber[REGNO (incloc)] >= 0))
+      if (GET_CODE (incloc) == REG
+	  && (REGNO (incloc) < FIRST_PSEUDO_REGISTER
+	      || reg_renumber[REGNO (incloc)] >= 0))
 	{
 	  rtx first_new
 	    = emit_insn_before (gen_add2_insn (incloc,
@@ -5676,9 +5676,9 @@ inc_for_reload (reloadreg, value, inc_amount, insn)
 
       /* If incrementing a register, assume we can
 	 output an insn to increment it directly.  */
-      if (GET_CODE (incloc) == REG &&
-	  (REGNO (incloc) < FIRST_PSEUDO_REGISTER
-	   || reg_renumber[REGNO (incloc)] >= 0))
+      if (GET_CODE (incloc) == REG
+	  && (REGNO (incloc) < FIRST_PSEUDO_REGISTER
+	      || reg_renumber[REGNO (incloc)] >= 0))
 	{
 	  emit_insn_before (gen_add2_insn (incloc,
 					   gen_rtx (CONST_INT, VOIDmode,

gcc/reorg.c

@@ -95,7 +95,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
 
    On machines that use CC0, we are very conservative.  We will not make
    a copy of an insn involving CC0 since we want to maintain a 1-1
-   correspondance between the insn that sets and uses CC0.  The insns are
+   correspondence between the insn that sets and uses CC0.  The insns are
    allowed to be separated by placing an insn that sets CC0 (but not an insn
    that uses CC0; we could do this, but it doesn't seem worthwhile) in a
    delay slot.  In that case, we point each insn at the other with REG_CC_USER
@@ -2666,7 +2666,7 @@ fill_slots_from_thread (insn, condition, thread, opposite_thread, likely,
      update THREAD and NEW_THREAD if it is done in the loop below.  Also
      initialize NEW_THREAD.  */
 
-  new_thread = thread = try_split (PATTERN (thread), thread);
+  new_thread = thread = try_split (PATTERN (thread), thread, 0);
 
   /* Scan insns at THREAD.  We are looking for an insn that can be removed
      from THREAD (it neither sets nor references resources that were set

gcc/rtl.h

@@ -108,7 +108,7 @@ typedef struct rtx_def
      1 in a LABEL_REF if this is a reference to a label outside the
      current loop.
      1 in an INSN, JUMP_INSN, or CALL_INSN if this insn must be scheduled
-     together with the preceeding insn.  Valid only within sched.
+     together with the preceding insn.  Valid only within sched.
      1 in an INSN, JUMP_INSN, or CALL_INSN if insn is in a delay slot and
      from the target of a branch.  Valid from reorg until end of compilation;
      cleared before used.  */
@@ -271,7 +271,7 @@ typedef struct rtvec_def{
      REG_LABEL points to a CODE_LABEL.  Used by non-JUMP_INSNs to
    say that the CODE_LABEL contained in the REG_LABEL note is used
    by the insn.
-    REG_DEP_ANTI is used in LOG_LINKS which represent anti (write after read)
+     REG_DEP_ANTI is used in LOG_LINKS which represent anti (write after read)
    dependencies.  REG_DEP_OUTPUT is used in LOG_LINKS which represent output
    (write after write) dependencies.  Data dependencies, which are the only
    type of LOG_LINK created by flow, are represented by a 0 reg note kind.  */
@@ -433,7 +433,7 @@ extern char *note_insn_name[];
 #define REG_LOOP_TEST_P(RTX) ((RTX)->in_struct)
 
 /* During sched, for an insn, 1 means that the insn must be scheduled together
-   with the preceeding insn.  */
+   with the preceding insn.  */
 #define SCHED_GROUP_P(INSN) ((INSN)->in_struct)
 
 /* For a SET rtx, SET_DEST is the place that is set