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lvzhengyang
riscv-gcc-1
Commits
d42a3bae
Commit
d42a3bae
authored
Sep 06, 2007
by
Revital Eres
Committed by
Revital Eres
Sep 06, 2007
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Fix offsettable memory reference for 750CL
From-SVN: r128184
parent
bd379f73
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gcc/config/rs6000/rs6000.c
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gcc/ChangeLog
View file @
d42a3bae
2007-09-06 Revital Eres <eres@il.ibm.com>
* config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p):
Fix offsettable memory reference for 750CL.
2007-09-06 Pat Haugen <pthaugen@us.ibm.com>
2007-09-06 Pat Haugen <pthaugen@us.ibm.com>
* reload.c (find_reloads_address_1): Try to preserve original
* reload.c (find_reloads_address_1): Try to preserve original
...
...
gcc/config/rs6000/rs6000.c
View file @
d42a3bae
...
@@ -3203,6 +3203,11 @@ rs6000_legitimate_offset_address_p (enum machine_mode mode, rtx x, int strict)
...
@@ -3203,6 +3203,11 @@ rs6000_legitimate_offset_address_p (enum machine_mode mode, rtx x, int strict)
case
V2SImode
:
case
V2SImode
:
case
V1DImode
:
case
V1DImode
:
case
V2SFmode
:
case
V2SFmode
:
/* Paired vector modes. Only reg+reg addressing is valid and
constant offset zero should not occur due to canonicalization.
Allow any offset when not strict before reload. */
if
(
TARGET_PAIRED_FLOAT
)
return
!
strict
;
/* SPE vector modes. */
/* SPE vector modes. */
return
SPE_CONST_OFFSET_OK
(
offset
);
return
SPE_CONST_OFFSET_OK
(
offset
);
...
...
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