re PR target/64793 ([SH] missed delay slot)

gcc/
	PR target/64793
	* config/sh/sh.md (cbranch define_delay): Set annulled true branch insn
	to nil.  Adjust comments.

gcc/testsuite/
	PR target/64793
	* gcc.target/sh/pr64793.c: New.
	* gcc.target/sh/pr51244-20-sh2a.c: Adjust expected cmp/gt insn count.

From-SVN: r220772

gcc/ChangeLog

+2015-02-17  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/64793
+	* config/sh/sh.md (cbranch define_delay): Set annulled true branch insn
+	to nil.  Adjust comments.
+
 2015-02-17  Jan Hubicka  <hubicka@ucw.cz>
 
 	* ipa-visibility.c (function_and_variable_visibility): Only

gcc/config/sh/sh.md

@@ -593,20 +593,10 @@
   [(and (eq_attr "in_delay_slot" "yes")
 	(eq_attr "type" "!pstore,prget")) (nil) (nil)])
 
-;; Say that we have annulled true branches, since this gives smaller and
-;; faster code when branches are predicted as not taken.
-
-;; ??? The non-annulled condition should really be "in_delay_slot",
-;; but insns that can be filled in non-annulled get priority over insns
-;; that can only be filled in anulled.
-
+;; Conditional branches with delay slots are available starting with SH2.
 (define_delay
-  (and (eq_attr "type" "cbranch")
-       (match_test "TARGET_SH2"))
-  ;; SH2e has a hardware bug that pretty much prohibits the use of
-  ;; annulled delay slots.
-  [(eq_attr "cond_delay_slot" "yes") (and (eq_attr "cond_delay_slot" "yes")
-					  (not (eq_attr "cpu" "sh2e"))) (nil)])
+  (and (eq_attr "type" "cbranch") (match_test "TARGET_SH2"))
+  [(eq_attr "cond_delay_slot" "yes") (nil) (nil)])
 
 ;; -------------------------------------------------------------------------
 ;; SImode signed integer comparisons

gcc/testsuite/ChangeLog

+2015-02-17  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/64793
+	* gcc.target/sh/pr64793.c: New.
+	* gcc.target/sh/pr51244-20-sh2a.c: Adjust expected cmp/gt insn count.
+
 2015-02-17  Sandra Loosemore  <sandra@codesourcery.com>
 
 	* gcc.target/arm/divzero.c: New test case.

gcc/testsuite/gcc.target/sh/pr51244-20-sh2a.c

@@ -8,7 +8,7 @@
 /* { dg-final { scan-assembler-times "nott" 2 } } */
 /* { dg-final { scan-assembler-times "cmp/eq" 2 } } */
 /* { dg-final { scan-assembler-times "cmp/hi" 4 } } */
-/* { dg-final { scan-assembler-times "cmp/gt" 3 } } */
+/* { dg-final { scan-assembler-times "cmp/gt" 2 } } */
 /* { dg-final { scan-assembler-not "not\t" } } */
 
 #include "pr51244-20.c"

gcc/testsuite/gcc.target/sh/pr64793.c

+/* Check that the delay slot of an rts insn is filled, if it follows a cbranch
+   with an unfilled delay slot, as in:
+	bt	.L3
+	mov	r7,r0	<<< this insn
+	rts
+	nop		<<< should go into this delay slot
+*/
+/* { dg-do compile }  */
+/* { dg-options "-O2" }  */
+/* { dg-final { scan-assembler-not "nop" } }  */
+
+int
+test_0 (const char* x, int a, int b, int c)
+{
+  if (x[a] == 92)
+    return b;
+  return c;
+}