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riscv-gcc-1
Commit d30c9461 by Richard Henderson Committed by Richard Henderson
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re PR target/19235 (GCC generates SSE2 instructions for AthlonXP which doesn't support them.) 

        PR target/19235
        * config/i386/i386.md (movdi_2): Separate SSE1 and SSE2 alternatives.
        (mov<MMXMODEI>_internal): Likewise.
        (movdf_nointeger): Prefer Y while not preferring, but allowing, x.
        Add V2SF case; use it for SSE1; don't use TI.
        (movdf_integer): Likewise.
        (mov<SSEMODEI>_internal, movti_internal): Force V4SF for SSE1.

From-SVN: r92889
parent 7d23434b
Showing with 55 additions and 28 deletions
gcc/ChangeLog
2005-01-03 Richard Henderson <rth@redhat.com>
PR target/19235
* config/i386/i386.md (movdi_2): Separate SSE1 and SSE2 alternatives.
(mov<MMXMODEI>_internal): Likewise.
(movdf_nointeger): Prefer Y while not preferring, but allowing, x.
Add V2SF case; use it for SSE1; don't use TI.
(movdf_integer): Likewise.
(mov<SSEMODEI>_internal, movti_internal): Force V4SF for SSE1.
2005-01-03 Ira Rosen <irar@il.ibm.com>
* tree-vectorizer.c (vect_strip_conversions): New function.
......
gcc/config/i386/i386.md
......@@ -1899,8 +1899,10 @@
(set_attr "length_immediate" "1")])
(define_insn "*movdi_2"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,!m*y,!*y,!m,!*x,!*x")
(match_operand:DI 1 "general_operand" "riFo,riF,*y,m,*x,*x,m"))]
[(set (match_operand:DI 0 "nonimmediate_operand"
"=r ,o ,m*y,*y,m ,*Y,*Y,m ,*x,*x")
(match_operand:DI 1 "general_operand"
"riFo,riF,*y ,m ,*Y,*Y,m ,*x,*x,m "))]
"!TARGET_64BIT
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"@
......@@ -1910,9 +1912,12 @@
movq\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}
movdqa\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}"
[(set_attr "type" "*,*,mmx,mmx,ssemov,ssemov,ssemov")
(set_attr "mode" "DI,DI,DI,DI,DI,TI,DI")])
movq\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}
movaps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}"
[(set_attr "type" "*,*,mmx,mmx,ssemov,ssemov,ssemov,ssemov,ssemov,ssemov")
(set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,V2SF,V4SF,V2SF")])
(define_split
[(set (match_operand:DI 0 "push_operand" "")
......@@ -2444,9 +2449,9 @@
(define_insn "*movdf_nointeger"
[(set (match_operand:DF 0 "nonimmediate_operand"
"=f#x,m ,f#x,*r ,o ,x#f,x#f,x#f ,m")
"=f#Y,m ,f#Y,*r ,o ,Y#f*x,Y#f*x,Y#f*x ,m ")
(match_operand:DF 1 "general_operand"
"fm#x,f#x,G ,*roF,F*r,C ,x#f,xHm#f,x#f"))]
"fm#Y,f#Y,G ,*roF,F*r,C ,Y#f*x,HmY#f*x,Y#f*x"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& ((optimize_size || !TARGET_INTEGER_DFMODE_MOVES) && !TARGET_64BIT)
&& (reload_in_progress || reload_completed
......@@ -2500,6 +2505,8 @@
return "movsd\t{%1, %0|%0, %1}";
case MODE_V1DF:
return "movlpd\t{%1, %0|%0, %1}";
case MODE_V2SF:
return "movlps\t{%1, %0|%0, %1}";
default:
abort ();
}
......@@ -2510,18 +2517,17 @@
}
[(set_attr "type" "fmov,fmov,fmov,multi,multi,ssemov,ssemov,ssemov,ssemov")
(set (attr "mode")
(cond [(eq_attr "alternative" "3,4")
(cond [(eq_attr "alternative" "0,1,2")
(const_string "DF")
(eq_attr "alternative" "3,4")
(const_string "SI")
/* For SSE1, we have many fewer alternatives. */
(eq (symbol_ref "TARGET_SSE2") (const_int 0))
(cond [(eq_attr "alternative" "5,6")
(if_then_else
(ne (symbol_ref "optimize_size") (const_int 0))
(const_string "V4SF")
(const_string "TI"))
(const_string "V4SF")
]
(const_string "DI"))
(const_string "V2SF"))
/* xorps is one byte shorter. */
(eq_attr "alternative" "5")
......@@ -2563,9 +2569,9 @@
(define_insn "*movdf_integer"
[(set (match_operand:DF 0 "nonimmediate_operand"
"=f#Yr,m ,f#Yr,r#Yf ,o ,Y#rf,Y#rf,Y#rf ,m")
"=f#Yr,m ,f#Yr,r#Yf ,o ,Y#rf*x,Y#rf*x,Y#rf*x,m")
(match_operand:DF 1 "general_operand"
"fm#Yr,f#Yr,G ,roF#Yf,Fr#Yf,C ,Y#rf,Ym#rf,Y#rf"))]
"fm#Yr,f#Yr,G ,roF#Yf,Fr#Yf,C ,Y#rf*x,m ,Y#rf*x"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& ((!optimize_size && TARGET_INTEGER_DFMODE_MOVES) || TARGET_64BIT)
&& (reload_in_progress || reload_completed
......@@ -2620,6 +2626,8 @@
return "movsd\t{%1, %0|%0, %1}";
case MODE_V1DF:
return "movlpd\t{%1, %0|%0, %1}";
case MODE_V2SF:
return "movlps\t{%1, %0|%0, %1}";
default:
abort ();
}
......@@ -2630,18 +2638,17 @@
}
[(set_attr "type" "fmov,fmov,fmov,multi,multi,ssemov,ssemov,ssemov,ssemov")
(set (attr "mode")
(cond [(eq_attr "alternative" "3,4")
(cond [(eq_attr "alternative" "0,1,2")
(const_string "DF")
(eq_attr "alternative" "3,4")
(const_string "SI")
/* For SSE1, we have many fewer alternatives. */
(eq (symbol_ref "TARGET_SSE2") (const_int 0))
(cond [(eq_attr "alternative" "5,6")
(if_then_else
(ne (symbol_ref "optimize_size") (const_int 0))
(const_string "V4SF")
(const_string "TI"))
(const_string "V4SF")
]
(const_string "DI"))
(const_string "V2SF"))
/* xorps is one byte shorter. */
(eq_attr "alternative" "5")
......@@ -19825,7 +19832,10 @@
}
[(set_attr "type" "ssemov")
(set (attr "mode")
(cond [(eq_attr "alternative" "0,1")
(cond [(eq (symbol_ref "TARGET_SSE2") (const_int 0))
(const_string "V4SF")
(eq_attr "alternative" "0,1")
(if_then_else
(ne (symbol_ref "optimize_size")
(const_int 0))
......@@ -19878,9 +19888,9 @@
(define_insn "*mov<mode>_internal"
[(set (match_operand:MMXMODEI 0 "nonimmediate_operand"
"=*y,*y ,m ,*y,*Y,*x,*x ,m")
"=*y,*y ,m ,*y,*Y,*Y,*Y ,m ,*x,*x,*x,m")
(match_operand:MMXMODEI 1 "vector_move_operand"
"C ,*ym,*y,*Y,*y,C ,*xm,*x"))]
"C ,*ym,*y,*Y,*y,C ,*Ym,*Y,C ,*x,m ,*x"))]
"TARGET_MMX
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"@
......@@ -19891,9 +19901,13 @@
movq2dq\t{%1, %0|%0, %1}
pxor\t%0, %0
movq\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov")
(set_attr "mode" "DI")])
movq\t{%1, %0|%0, %1}
xorps\t%0, %0
movaps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov,ssemov,ssemov,ssemov,ssemov")
(set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,DI,V4SF,V4SF,V2SF,V2SF")])
(define_expand "movv2sf"
[(set (match_operand:V2SF 0 "nonimmediate_operand" "")
......@@ -19983,7 +19997,10 @@
}
[(set_attr "type" "ssemov,ssemov,ssemov")
(set (attr "mode")
(cond [(eq_attr "alternative" "0,1")
(cond [(eq (symbol_ref "TARGET_SSE2") (const_int 0))
(const_string "V4SF")
(eq_attr "alternative" "0,1")
(if_then_else
(ne (symbol_ref "optimize_size")
(const_int 0))
......
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