mips.md (*mov<mode>_internal, [...]): Adjust constraints for microMIPS store patterns.

2014-04-16  Catherine Moore  <clm@codesourcery.com>

	gcc/
	* mips.md (*mov<mode>_internal, *movhi_internal, *movqi_internal):
	Adjust constraints for microMIPS store patterns.

	testsuite/
	* gcc.target/mips/umips-store16-2.c: New test.

From-SVN: r209450

gcc/ChangeLog

+2014-04-16  Catherine Moore  <clm@codesourcery.com>
+
+	* mips.md (*mov<mode>_internal, *movhi_internal, *movqi_internal):
+	Adjust constraints for microMIPS store patterns.
+
 2014-04-16  Pitchumani Sivanupandi  <Pitchumani.S@atmel.com>
 
 	* config/avr/avr-mcus.def: Correct typo for atxmega256a3bu macro.

gcc/config/mips/mips.md

@@ -4437,7 +4437,7 @@
 
 (define_insn "*mov<mode>_internal"
   [(set (match_operand:IMOVE32 0 "nonimmediate_operand" "=d,!u,!u,d,e,!u,!ks,d,ZS,ZT,m,*f,*f,*d,*m,*d,*z,*a,*d,*B*C*D,*B*C*D,*d,*m")
-	(match_operand:IMOVE32 1 "move_operand" "d,J,Udb7,Yd,Yf,ZT,ZS,m,!ks,!kb,dJ,*d*J,*m,*f,*f,*z,*d,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
+	(match_operand:IMOVE32 1 "move_operand" "d,J,Udb7,Yd,Yf,ZT,ZS,m,!ks,!kbJ,dJ,*d*J,*m,*f,*f,*z,*d,*J*d,*a,*d,*m,*B*C*D,*B*C*D"))]
   "!TARGET_MIPS16
    && (register_operand (operands[0], <MODE>mode)
        || reg_or_0_operand (operands[1], <MODE>mode))"
@@ -4578,7 +4578,7 @@
 
 (define_insn "*movhi_internal"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=d,!u,d,!u,d,ZU,m,*a,*d")
-	(match_operand:HI 1 "move_operand"         "d,J,I,ZU,m,!kb,dJ,*d*J,*a"))]
+	(match_operand:HI 1 "move_operand"         "d,J,I,ZU,m,!kbJ,dJ,*d*J,*a"))]
   "!TARGET_MIPS16
    && (register_operand (operands[0], HImode)
        || reg_or_0_operand (operands[1], HImode))"
@@ -4654,7 +4654,7 @@
 
 (define_insn "*movqi_internal"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=d,!u,d,!u,d,ZV,m,*a,*d")
-	(match_operand:QI 1 "move_operand"         "d,J,I,ZW,m,!kb,dJ,*d*J,*a"))]
+	(match_operand:QI 1 "move_operand"         "d,J,I,ZW,m,!kbJ,dJ,*d*J,*a"))]
   "!TARGET_MIPS16
    && (register_operand (operands[0], QImode)
        || reg_or_0_operand (operands[1], QImode))"

gcc/testsuite/ChangeLog

+2014-04-16  Catherine Moore  <clm@codesourcery.com>
+
+	* gcc.target/mips/umips-store16-2.c: New test.
+
 2014-04-16  Marc Glisse  <marc.glisse@inria.fr>
 
 	* g++.dg/cpp0x/initlist-vect.C: New file.

gcc/testsuite/gcc.target/mips/umips-store16-2.c

+/* { dg-options "(-mmicromips) -dp" } */
+
+MICROMIPS void
+f1 (unsigned char *ptr)
+{
+  *ptr = 0;
+}
+
+MICROMIPS void
+f2 (unsigned short *ptr)
+{
+  *ptr = 0;
+}
+
+MICROMIPS void
+f3 (unsigned int *ptr)
+{
+  *ptr = 0;
+}
+/* { dg-final { scan-assembler "\tsb\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */
+/* { dg-final { scan-assembler "\tsh\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */
+/* { dg-final { scan-assembler "\tsw\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */