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riscv-gcc-1
Commit d290b037 by Michael Meissner Committed by Michael Meissner
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rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add OPTION_MASK_P9_DFORM. 

2016-01-04  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
	OPTION_MASK_P9_DFORM.

From-SVN: r232061
parent 4e8a3a35
Showing with 4 additions and 0 deletions
gcc/ChangeLog
2016-01-04 Michael Meissner <meissner@linux.vnet.ibm.com> 2016-01-04 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
OPTION_MASK_P9_DFORM.
* config/rs6000/constraints.md (wo constraint): New constraint for * config/rs6000/constraints.md (wo constraint): New constraint for
ISA 3.0 (power9). ISA 3.0 (power9).
......
gcc/config/rs6000/rs6000-cpus.def
...@@ -67,6 +67,7 @@ ...@@ -67,6 +67,7 @@
| OPTION_MASK_ISEL \ | OPTION_MASK_ISEL \
| OPTION_MASK_MODULO \ | OPTION_MASK_MODULO \
| OPTION_MASK_P9_FUSION \ | OPTION_MASK_P9_FUSION \
| OPTION_MASK_P9_DFORM \
| OPTION_MASK_P9_VECTOR) | OPTION_MASK_P9_VECTOR)
#define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC) #define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC)
......
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