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Commit d2894ab5 by David Edelsohn Committed by David Edelsohn
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rs6000.opt (no-fp-in-toc): Use Var not Mask. 

        * config/rs6000/rs6000.opt (no-fp-in-toc): Use Var not Mask.
        (no-sum-in-toc): Same.
        * config/rs6000/rs6000.c (rs6000_handle_option): Use new
        variables.
        * config/rs6000/sysv4.h (SUBTARGET_OVERRIDE_OPTIONS): Set
        NO_FP_IN_TOC for -fPIC instead of mask.

        * config/rs6000/t-aix43 (T_ADAFLAGS): Delete.
        (BOOT_LDFLAGS): Delete.
        (LDFLAGS): Delete.
        * config/rs6000/t-aix52: Same.

        * config/rs6000/rs6000.md (store_multiple_power): Delete.
        (stmsi[345678]_power): New.

From-SVN: r112215
parent 79a495f1
Showing with 139 additions and 34 deletions
gcc/ChangeLog
2006-03-19 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.opt (no-fp-in-toc): Use Var not Mask.
(no-sum-in-toc): Same.
* config/rs6000/rs6000.c (rs6000_handle_option): Use new
variables.
* config/rs6000/sysv4.h (SUBTARGET_OVERRIDE_OPTIONS): Set
NO_FP_IN_TOC for -fPIC instead of mask.
* config/rs6000/t-aix43 (T_ADAFLAGS): Delete.
(BOOT_LDFLAGS): Delete.
(LDFLAGS): Delete.
* config/rs6000/t-aix52: Same.
* config/rs6000/rs6000.md (store_multiple_power): Delete.
(stmsi[345678]_power): New.
2006-03-17 Steve Ellcey <sje@cup.hp.com>
* config/ia64/ia64.opt: Add empty line to end of file.
......
gcc/config/rs6000/rs6000.c
......@@ -1635,10 +1635,10 @@ rs6000_handle_option (size_t code, const char *arg, int value)
| MASK_PPC_GFXOPT | MASK_POWERPC64);
break;
case OPT_mfull_toc:
target_flags &= ~(MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC
| MASK_NO_SUM_IN_TOC);
target_flags_explicit |= (MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC
| MASK_NO_SUM_IN_TOC);
target_flags &= ~MASK_MINIMAL_TOC;
TARGET_NO_FP_IN_TOC = 0;
TARGET_NO_SUM_IN_TOC = 0;
target_flags_explicit |= MASK_MINIMAL_TOC;
#ifdef TARGET_USES_SYSV4_OPT
/* Note, V.4 no longer uses a normal TOC, so make -mfull-toc, be
just the same as -mminimal-toc. */
......@@ -1681,8 +1681,8 @@ rs6000_handle_option (size_t code, const char *arg, int value)
case OPT_mminimal_toc:
if (value == 1)
{
target_flags &= ~(MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC);
target_flags_explicit |= (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC);
TARGET_NO_FP_IN_TOC = 0;
TARGET_NO_SUM_IN_TOC = 0;
}
break;
......
gcc/config/rs6000/rs6000.md
......@@ -8989,15 +8989,6 @@
gen_rtx_REG (SImode, regno + i));
}")
(define_insn "*store_multiple_power"
[(match_parallel 0 "store_multiple_operation"
[(set (match_operand:SI 1 "indirect_operand" "=Q")
(match_operand:SI 2 "gpc_reg_operand" "r"))
(clobber (match_scratch:SI 3 "=q"))])]
"TARGET_STRING && TARGET_POWER"
"{stsi|stswi} %2,%P1,%O0"
[(set_attr "type" "store")])
(define_insn "*stmsi8"
[(match_parallel 0 "store_multiple_operation"
[(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
......@@ -9105,6 +9096,114 @@
"TARGET_STRING && !TARGET_POWER && XVECLEN (operands[0], 0) == 4"
"{stsi|stswi} %2,%1,%O0"
[(set_attr "type" "store_ux")])
(define_insn "*stmsi8_power"
[(match_parallel 0 "store_multiple_operation"
[(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
(match_operand:SI 2 "gpc_reg_operand" "r"))
(clobber (match_scratch:SI 3 "q"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
(match_operand:SI 4 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
(match_operand:SI 5 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
(match_operand:SI 6 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
(match_operand:SI 7 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 20)))
(match_operand:SI 8 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 24)))
(match_operand:SI 9 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 28)))
(match_operand:SI 10 "gpc_reg_operand" "r"))])]
"TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 9"
"{stsi|stswi} %2,%1,%O0"
[(set_attr "type" "store_ux")])
(define_insn "*stmsi7_power"
[(match_parallel 0 "store_multiple_operation"
[(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
(match_operand:SI 2 "gpc_reg_operand" "r"))
(clobber (match_scratch:SI 3 "q"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
(match_operand:SI 4 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
(match_operand:SI 5 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
(match_operand:SI 6 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
(match_operand:SI 7 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 20)))
(match_operand:SI 8 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 24)))
(match_operand:SI 9 "gpc_reg_operand" "r"))])]
"TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 8"
"{stsi|stswi} %2,%1,%O0"
[(set_attr "type" "store_ux")])
(define_insn "*stmsi6_power"
[(match_parallel 0 "store_multiple_operation"
[(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
(match_operand:SI 2 "gpc_reg_operand" "r"))
(clobber (match_scratch:SI 3 "q"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
(match_operand:SI 4 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
(match_operand:SI 5 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
(match_operand:SI 6 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
(match_operand:SI 7 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 20)))
(match_operand:SI 8 "gpc_reg_operand" "r"))])]
"TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 7"
"{stsi|stswi} %2,%1,%O0"
[(set_attr "type" "store_ux")])
(define_insn "*stmsi5_power"
[(match_parallel 0 "store_multiple_operation"
[(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
(match_operand:SI 2 "gpc_reg_operand" "r"))
(clobber (match_scratch:SI 3 "q"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
(match_operand:SI 4 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
(match_operand:SI 5 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
(match_operand:SI 6 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
(match_operand:SI 7 "gpc_reg_operand" "r"))])]
"TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 6"
"{stsi|stswi} %2,%1,%O0"
[(set_attr "type" "store_ux")])
(define_insn "*stmsi4_power"
[(match_parallel 0 "store_multiple_operation"
[(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
(match_operand:SI 2 "gpc_reg_operand" "r"))
(clobber (match_scratch:SI 3 "q"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
(match_operand:SI 4 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
(match_operand:SI 5 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
(match_operand:SI 6 "gpc_reg_operand" "r"))])]
"TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 5"
"{stsi|stswi} %2,%1,%O0"
[(set_attr "type" "store_ux")])
(define_insn "*stmsi3_power"
[(match_parallel 0 "store_multiple_operation"
[(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
(match_operand:SI 2 "gpc_reg_operand" "r"))
(clobber (match_scratch:SI 3 "q"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
(match_operand:SI 4 "gpc_reg_operand" "r"))
(set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
(match_operand:SI 5 "gpc_reg_operand" "r"))])]
"TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 4"
"{stsi|stswi} %2,%1,%O0"
[(set_attr "type" "store_ux")])
(define_expand "setmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
......
gcc/config/rs6000/rs6000.opt
......@@ -140,19 +140,19 @@ Target Report Var(swdiv)
Generate software floating point divide for better throughput
mno-fp-in-toc
Target Report RejectNegative Mask(NO_FP_IN_TOC)
Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC)
Do not place floating point constants in TOC
mfp-in-toc
Target Report RejectNegative InverseMask(NO_FP_IN_TOC)
Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0) VarExists
Place floating point constants in TOC
mno-sum-in-toc
Target RejectNegative Mask(NO_SUM_IN_TOC)
Target RejectNegative Var(TARGET_NO_SUM_IN_TOC)
Do not place symbol+offset constants in TOC
msum-in-toc
Target RejectNegative InverseMask(NO_SUM_IN_TOC)
Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) VarExists
Place symbol+offset constants in TOC
; Output only one TOC entry per module. Normally linking fails if
......
gcc/config/rs6000/sysv4.h
......@@ -221,7 +221,10 @@ do { \
\
/* Treat -fPIC the same as -mrelocatable. */ \
if (flag_pic > 1 && DEFAULT_ABI != ABI_AIX) \
target_flags |= MASK_RELOCATABLE | MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC; \
{ \
target_flags |= MASK_RELOCATABLE | MASK_MINIMAL_TOC; \
TARGET_NO_FP_IN_TOC = 1; \
} \
\
else if (TARGET_RELOCATABLE) \
flag_pic = 2; \
......
gcc/config/rs6000/t-aix43
......@@ -74,10 +74,3 @@ TARGET_LIBGCC2_CFLAGS = -mlong-double-128
# Either 32-bit and 64-bit objects in archives.
AR_FLAGS_FOR_TARGET = -X32_64
# Compile Ada files with minimal-toc. The primary focus is gnatlib, so
# that the library does not use nearly the entire TOC of applications
# until gnatlib is built as a shared library on AIX. Compiling the
# compiler with -mminimal-toc does not cause any harm.
T_ADAFLAGS = -mminimal-toc
BOOT_LDFLAGS = -Wl,-bbigtoc
LDFLAGS = `case $(CC) in *gcc*) echo -Wl,-bbigtoc ;; esac;`
gcc/config/rs6000/t-aix52
......@@ -55,10 +55,3 @@ TARGET_LIBGCC2_CFLAGS = -mlong-double-128
# Either 32-bit and 64-bit objects in archives.
AR_FLAGS_FOR_TARGET = -X32_64
# Compile Ada files with minimal-toc. The primary focus is gnatlib, so
# that the library does not use nearly the entire TOC of applications
# until gnatlib is built as a shared library on AIX. Compiling the
# compiler with -mminimal-toc does not cause any harm.
T_ADAFLAGS = -mminimal-toc
BOOT_LDFLAGS = -Wl,-bbigtoc
LDFLAGS = `case $(CC) in *gcc*) echo -Wl,-bbigtoc ;; esac;`
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