sparc.md (mov[sdt]f_const_insn): Fix condition to match what the instruction can handle.

	* sparc/sparc.md (mov[sdt]f_const_insn): Fix condition to match
	what the instruction can handle.

From-SVN: r16422

gcc/ChangeLog

+Mon Nov 10 16:21:58 1997  Doug Evans  <devans@canuck.cygnus.com>
+
+	* sparc/sparc.md (mov[sdt]f_const_insn): Fix condition to match
+	what the instruction can handle.
+
 Mon Nov 10 03:02:19 1997  Jason Merrill  <jason@yorick.cygnus.com>
 
 	* stmt.c (expand_decl_cleanup_no_eh): New fn.

gcc/config/sparc/sparc.md

@@ -2157,7 +2157,10 @@
 (define_insn "*movsf_const_insn"
   [(set (match_operand:SF 0 "general_operand" "=?r,f,m")
 	(match_operand:SF 1 "" "?F,m,G"))]
-  "TARGET_FPU && GET_CODE (operands[1]) == CONST_DOUBLE"
+  "TARGET_FPU
+   && GET_CODE (operands[1]) == CONST_DOUBLE
+   && (GET_CODE (operands[0]) == REG
+       || fp_zero_operand (operands[1]))"
   "*
 {
   switch (which_alternative)
@@ -2231,7 +2234,10 @@
 (define_insn "*movdf_const_insn"
   [(set (match_operand:DF 0 "general_operand" "=?r,e,o")
 	(match_operand:DF 1 "" "?F,m,G"))]
-  "TARGET_FPU && GET_CODE (operands[1]) == CONST_DOUBLE"
+  "TARGET_FPU
+   && GET_CODE (operands[1]) == CONST_DOUBLE
+   && (GET_CODE (operands[0]) == REG
+       || fp_zero_operand (operands[1]))"
   "*
 {
   switch (which_alternative)
@@ -2349,7 +2355,10 @@
 (define_insn "*movtf_const_insn"
   [(set (match_operand:TF 0 "general_operand" "=?r,e,o")
 	(match_operand:TF 1 "" "?F,m,G"))]
-  "TARGET_FPU && GET_CODE (operands[1]) == CONST_DOUBLE"
+  "TARGET_FPU
+   && GET_CODE (operands[1]) == CONST_DOUBLE
+   && (GET_CODE (operands[0]) == REG
+       || fp_zero_operand (operands[1]))"
   "*
 {
   switch (which_alternative)