Commit d1e32c4a by H.J. Lu Committed by H.J. Lu

Check zero/sign extended hard registers.

2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR middle-end/47725
	* combine.c (cant_combine_insn_p): Check zero/sign extended
	hard registers.

From-SVN: r175218
parent b028af11
2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR middle-end/47725
* combine.c (cant_combine_insn_p): Check zero/sign extended
hard registers.
2011-06-20 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
PR target/49385
......
......@@ -2168,6 +2168,12 @@ cant_combine_insn_p (rtx insn)
return 0;
src = SET_SRC (set);
dest = SET_DEST (set);
if (GET_CODE (src) == ZERO_EXTEND
|| GET_CODE (src) == SIGN_EXTEND)
src = XEXP (src, 0);
if (GET_CODE (dest) == ZERO_EXTEND
|| GET_CODE (dest) == SIGN_EXTEND)
dest = XEXP (dest, 0);
if (GET_CODE (src) == SUBREG)
src = SUBREG_REG (src);
if (GET_CODE (dest) == SUBREG)
......
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