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lvzhengyang
riscv-gcc-1
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d096936c
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d096936c
authored
Aug 19, 2004
by
Richard Sandiford
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Fix comment typo in last delta.
From-SVN: r86261
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438c7f23
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gcc/config/mips/mips.c
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d096936c
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@@ -3005,7 +3005,7 @@ mips_arg_info (const CUMULATIVE_ARGS *cum, enum machine_mode mode,
single "void *" va_list type, since register and stack arguments
are passed differently. (At the time of writing, MIPSpro cannot
handle complex float varargs correctly.) Second, it's unclear
hat should happen when there is only one register free.
w
hat should happen when there is only one register free.
For now, we assume that named complex floats should go into FPRs
if there are two FPRs free, otherwise they should be passed in the
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