Commit d08c0ea3 by Maciej W. Rozycki Committed by Maciej W. Rozycki

MIPS16/GCC: Fix DImode `casesi_internal_mips16_<mode>' assembly instructions

	gcc/
	* config/mips/mips.md (casesi_internal_mips16_<mode>): Add
	missing <d> instruction prefixes throughout.  Correct
	formatting.

	gcc/testsuite/
	* gcc.target/mips/code-readable-4.c (dg-final): Expect `dla'
	rather than `la'.

From-SVN: r242514
parent fc72d1ed
2016-11-16 Maciej W. Rozycki <macro@imgtec.com> 2016-11-16 Maciej W. Rozycki <macro@imgtec.com>
* config/mips/mips.md (casesi_internal_mips16_<mode>): Add
missing <d> instruction prefixes throughout. Correct
formatting.
2016-11-16 Maciej W. Rozycki <macro@imgtec.com>
* config/mips/mips.c (mips_output_jump): Output R_MICROMIPS_JALR * config/mips/mips.c (mips_output_jump): Output R_MICROMIPS_JALR
rather than R_MIPS_JALR relocation in microMIPS code. Do not rather than R_MIPS_JALR relocation in microMIPS code. Do not
cancel short delay slots in PIC call relaxation. cancel short delay slots in PIC call relaxation.
...@@ -6424,14 +6424,14 @@ ...@@ -6424,14 +6424,14 @@
{ {
case HImode: case HImode:
output_asm_insn ("sll\t%5, %0, 1", operands); output_asm_insn ("sll\t%5, %0, 1", operands);
output_asm_insn ("la\t%4, %2", operands); output_asm_insn ("<d>la\t%4, %2", operands);
output_asm_insn ("<d>addu\t%5, %4, %5", operands); output_asm_insn ("<d>addu\t%5, %4, %5", operands);
output_asm_insn ("lh\t%5, 0(%5)", operands); output_asm_insn ("lh\t%5, 0(%5)", operands);
break; break;
case SImode: case SImode:
output_asm_insn ("sll\t%5, %0, 2", operands); output_asm_insn ("sll\t%5, %0, 2", operands);
output_asm_insn ("la\t%4, %2", operands); output_asm_insn ("<d>la\t%4, %2", operands);
output_asm_insn ("<d>addu\t%5, %4, %5", operands); output_asm_insn ("<d>addu\t%5, %4, %5", operands);
output_asm_insn ("lw\t%5, 0(%5)", operands); output_asm_insn ("lw\t%5, 0(%5)", operands);
break; break;
...@@ -6439,9 +6439,9 @@ ...@@ -6439,9 +6439,9 @@
default: default:
gcc_unreachable (); gcc_unreachable ();
} }
output_asm_insn ("addu\t%4, %4, %5", operands); output_asm_insn ("<d>addu\t%4, %4, %5", operands);
return "j\t%4"; return "j\t%4";
} }
[(set_attr "insn_count" "16")]) [(set_attr "insn_count" "16")])
......
2016-11-16 Maciej W. Rozycki <macro@imgtec.com> 2016-11-16 Maciej W. Rozycki <macro@imgtec.com>
* gcc.target/mips/code-readable-4.c (dg-final): Expect `dla'
rather than `la'.
2016-11-16 Maciej W. Rozycki <macro@imgtec.com>
* gcc.target/mips/call-1.c (dg-options): Add `-mno-micromips'. * gcc.target/mips/call-1.c (dg-options): Add `-mno-micromips'.
(dg-final): Remove microMIPS JALRS mnemonic matching. (dg-final): Remove microMIPS JALRS mnemonic matching.
* gcc.target/mips/call-2.c (dg-options): Add `-mno-micromips'. * gcc.target/mips/call-2.c (dg-options): Add `-mno-micromips'.
......
...@@ -41,7 +41,7 @@ bar (void) ...@@ -41,7 +41,7 @@ bar (void)
return k; return k;
} }
/* { dg-final { scan-assembler "\tla\t" } } */ /* { dg-final { scan-assembler "\tdla\t" } } */
/* { dg-final { scan-assembler "\t\\.half\t" } } */ /* { dg-final { scan-assembler "\t\\.half\t" } } */
/* { dg-final { scan-assembler-not "%hi\\(\[^)\]*L" } } */ /* { dg-final { scan-assembler-not "%hi\\(\[^)\]*L" } } */
/* { dg-final { scan-assembler-not "%lo\\(\[^)\]*L" } } */ /* { dg-final { scan-assembler-not "%lo\\(\[^)\]*L" } } */
......
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