Commit d0337ddc by Alexander Ivchenko Committed by Kirill Yukhin

AVX-512. Add insert insn patterns.

gcc/
	* config/i386/i386.c
	(CODE_FOR_avx2_extracti128): Rename to ...
	(CODE_FOR_avx_vextractf128v4di): this.
	(CODE_FOR_avx2_inserti128): Rename to ...
	(CODE_FOR_avx_vinsertf128v4di): this.
	(ix86_expand_args_builtin): Handle CODE_FOR_avx_vinsertf128v4di,
	CODE_FOR_avx_vextractf128v4di.
	(ix86_expand_args_builtin): Handle CODE_FOR_avx512dq_vinsertf32x8_mask,
	CODE_FOR_avx512dq_vinserti32x8_mask, CODE_FOR_avx512vl_vinsertv4df,
	CODE_FOR_avx512vl_vinsertv4di, CODE_FOR_avx512vl_vinsertv8sf,
	CODE_FOR_avx512vl_vinsertv8si.
	* config/i386/sse.md
	(define_expand
	"<extract_type>_vinsert<shuffletype><extract_suf>_mask"): Use
	AVX512_VEC mode iterator.
	(define_insn
	"<mask_codefor><extract_type>_vinsert<shuffletype><extract_suf>_1<mask_name>"):
	Ditto.
	(define_expand
	"<extract_type_2>_vinsert<shuffletype><extract_suf_2>_mask"): Use
	AVX512_VEC_2 mode iterator.
	(define_insn "vec_set_lo_<mode><mask_name>"): New.
	(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
	(define_expand "avx512vl_vinsert<mode>"): Ditto.
	(define_insn "avx2_vec_set_lo_v4di"): Delete.
	(define_insn "avx2_vec_set_hi_v4di"): Ditto.
	(define_insn "vec_set_lo_<mode><mask_name>"): Add masking.
	(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
	(define_insn "vec_set_lo_<mode><mask_name>"): Ditto.
	(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
	(define_expand "avx2_extracti128"): Delete.
	(define_expand "avx2_inserti128"): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215542
parent f95dcc81
......@@ -7,6 +7,48 @@
Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/i386.c
(CODE_FOR_avx2_extracti128): Rename to ...
(CODE_FOR_avx_vextractf128v4di): this.
(CODE_FOR_avx2_inserti128): Rename to ...
(CODE_FOR_avx_vinsertf128v4di): this.
(ix86_expand_args_builtin): Handle CODE_FOR_avx_vinsertf128v4di,
CODE_FOR_avx_vextractf128v4di.
(ix86_expand_args_builtin): Handle CODE_FOR_avx512dq_vinsertf32x8_mask,
CODE_FOR_avx512dq_vinserti32x8_mask, CODE_FOR_avx512vl_vinsertv4df,
CODE_FOR_avx512vl_vinsertv4di, CODE_FOR_avx512vl_vinsertv8sf,
CODE_FOR_avx512vl_vinsertv8si.
* config/i386/sse.md
(define_expand
"<extract_type>_vinsert<shuffletype><extract_suf>_mask"): Use
AVX512_VEC mode iterator.
(define_insn
"<mask_codefor><extract_type>_vinsert<shuffletype><extract_suf>_1<mask_name>"):
Ditto.
(define_expand
"<extract_type_2>_vinsert<shuffletype><extract_suf_2>_mask"): Use
AVX512_VEC_2 mode iterator.
(define_insn "vec_set_lo_<mode><mask_name>"): New.
(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
(define_expand "avx512vl_vinsert<mode>"): Ditto.
(define_insn "avx2_vec_set_lo_v4di"): Delete.
(define_insn "avx2_vec_set_hi_v4di"): Ditto.
(define_insn "vec_set_lo_<mode><mask_name>"): Add masking.
(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
(define_insn "vec_set_lo_<mode><mask_name>"): Ditto.
(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
(define_expand "avx2_extracti128"): Delete.
(define_expand "avx2_inserti128"): Ditto.
2014-09-24 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Anna Tikhonova <anna.tikhonova@intel.com>
Ilya Tocar <ilya.tocar@intel.com>
Andrey Turetskiy <andrey.turetskiy@intel.com>
Ilya Verbin <ilya.verbin@intel.com>
Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/sse.md
(define_insn "avx2_<code>v16qiv16hi2<mask_name>"): Add masking.
(define_insn "avx512bw_<code>v32qiv32hi2<mask_name>"): New.
......@@ -29961,8 +29961,8 @@ static const struct builtin_description bdesc_args[] =
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_permv4df, "__builtin_ia32_permdf256", IX86_BUILTIN_VPERMDF256, UNKNOWN, (int) V4DF_FTYPE_V4DF_INT },
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_permv4di, "__builtin_ia32_permdi256", IX86_BUILTIN_VPERMDI256, UNKNOWN, (int) V4DI_FTYPE_V4DI_INT },
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_permv2ti, "__builtin_ia32_permti256", IX86_BUILTIN_VPERMTI256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_INT },
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_extracti128, "__builtin_ia32_extract128i256", IX86_BUILTIN_VEXTRACT128I256, UNKNOWN, (int) V2DI_FTYPE_V4DI_INT },
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_inserti128, "__builtin_ia32_insert128i256", IX86_BUILTIN_VINSERT128I256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V2DI_INT },
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx_vextractf128v4di, "__builtin_ia32_extract128i256", IX86_BUILTIN_VEXTRACT128I256, UNKNOWN, (int) V2DI_FTYPE_V4DI_INT },
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx_vinsertf128v4di, "__builtin_ia32_insert128i256", IX86_BUILTIN_VINSERT128I256, UNKNOWN, (int) V4DI_FTYPE_V4DI_V2DI_INT },
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_ashlvv4di, "__builtin_ia32_psllv4di", IX86_BUILTIN_PSLLVV4DI, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI },
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_ashlvv2di, "__builtin_ia32_psllv2di", IX86_BUILTIN_PSLLVV2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI },
{ OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_ashlvv8si, "__builtin_ia32_psllv8si", IX86_BUILTIN_PSLLVV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI },
......@@ -34053,8 +34053,8 @@ ix86_expand_args_builtin (const struct builtin_description *d,
if (!match)
switch (icode)
{
case CODE_FOR_avx2_inserti128:
case CODE_FOR_avx2_extracti128:
case CODE_FOR_avx_vinsertf128v4di:
case CODE_FOR_avx_vextractf128v4di:
error ("the last argument must be an 1-bit immediate");
return const0_rtx;
......@@ -34120,6 +34120,12 @@ ix86_expand_args_builtin (const struct builtin_description *d,
case CODE_FOR_avx512f_vinserti64x4_mask:
case CODE_FOR_avx512f_vextractf64x4_mask:
case CODE_FOR_avx512f_vextracti64x4_mask:
case CODE_FOR_avx512dq_vinsertf32x8_mask:
case CODE_FOR_avx512dq_vinserti32x8_mask:
case CODE_FOR_avx512vl_vinsertv4df:
case CODE_FOR_avx512vl_vinsertv4di:
case CODE_FOR_avx512vl_vinsertv8sf:
case CODE_FOR_avx512vl_vinsertv8si:
error ("the last argument must be a 1-bit immediate");
return const0_rtx;
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment