Commit cfdb984b by Adrian Straetling Committed by Ulrich Weigand

s390.c: (s390_adjust_priority): Adapt to changed attribute names.

2005-05-09  Adrian Straetling  <straetling@de.ibm.com>

	* config/s390/s390.c: (s390_adjust_priority): Adapt to changed
	attribute names.
	* config/s390/2084.md: ("x_fsimpd", "x_fsimps", "x_fdivd", "x_fdivs",
	"x_floadd", "x_floads", "x_fstored", "x_fstores"): Rename to
	("x_fsimpdf", "x_fsimpsf", "x_fdivdf", "x_fdivsf", "x_floaddf",
	"x_floadsf", "x_fstoredf", "x_fstoresf") and replace 'type'
	attribute names.
	* config/s390/s390.md: ("type"): Rename "fsimpd, fsimps, floadd, floads,
	fstored, fstores, fmuld, fmuls, fdivd, fdivs, fsqrtd, fsqrts" to
	"fsimpdf, fsimpsf, floaddf, floadsf, fstoredf, fstoresf, fmuldf,
	fmulsf, fdivdf, fdivsf, fsqrtdf, fsqrtsf".
	("*cmpdf_ccs_0", "*cmpdf_css_0_ibm", "*cmpdf_ccs",
	"*cmpdf_ccs_ibm", "*cmpsf_ccs_0", "*cmpsf_css_0_ibm",
	"*cmpsf_ccs", "*cmpsf_ccs_ibm", "*movdi_64", "*movdi_31",
	"*movsi_zarch", "*movsi_esa", "*movdf_64", "*movdf_31", "movsf",
	"*muldf3", "*muldf3_ibm", "*fmadddf", "*fmsubdf", "*mulsf3",
	"mulsf3_ibm", "*fmaddsf", "fmsubsf", "*divdf3", "*divdf3_ibm",
	"*negdf2_cc", "*negdf2_cconly", "*negdf2", "*negdf2_ibm",
	"*negsf2_cc", "*negsf2_cconly", "*negsf2", "*absdf2_cc",
	"*absdf2_cconly", "*absdf2", "*absdf2_ibm", "*abssf2_cc",
	"*abssf2_cconly", "*abssf2", "*abssf2_ibm", "*negabsdf2_cc",
	"*negabsdf2_cconly", "*negabsdf2", "*negabssf2_cc",
	"*negabssf2_cconly", "*negabssf2", "sqrtdf2", "sqrtsf2"): Rename
	'type' value.
	("*divsf3"): Additionally rename second pattern to
	"*divsf3_ibm".
	("truncdfsf2_ibm", "extendsfdf2_ieee", "extendsfdf2_ibm",
	"*adddf3", "*adddf3_cc", "*adddf3_cconly", "*adddf3_ibm",
	"*addsf3", "*addsf3_cc", "*addsf3_cconly", "*subdf3",
	"subdf3_cc", "*subdf3_cconly", "*subdf3_ibm", "*subsf3",
	"subsf3_cc", "*subsf3_cconly", "*subsf3_ibm"): Merge identical
	'type values' and rename 'type' value.
	("*addsf3"): Additionally rename second pattern to
	"*addsf3_ibm".

From-SVN: r99456
parent f337b930
2005-05-09 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.c: (s390_adjust_priority): Adapt to changed
attribute names.
* config/s390/2084.md: ("x_fsimpd", "x_fsimps", "x_fdivd", "x_fdivs",
"x_floadd", "x_floads", "x_fstored", "x_fstores"): Rename to
("x_fsimpdf", "x_fsimpsf", "x_fdivdf", "x_fdivsf", "x_floaddf",
"x_floadsf", "x_fstoredf", "x_fstoresf") and replace 'type'
attribute names.
* config/s390/s390.md: ("type"): Rename "fsimpd, fsimps, floadd, floads,
fstored, fstores, fmuld, fmuls, fdivd, fdivs, fsqrtd, fsqrts" to
"fsimpdf, fsimpsf, floaddf, floadsf, fstoredf, fstoresf, fmuldf,
fmulsf, fdivdf, fdivsf, fsqrtdf, fsqrtsf".
("*cmpdf_ccs_0", "*cmpdf_css_0_ibm", "*cmpdf_ccs",
"*cmpdf_ccs_ibm", "*cmpsf_ccs_0", "*cmpsf_css_0_ibm",
"*cmpsf_ccs", "*cmpsf_ccs_ibm", "*movdi_64", "*movdi_31",
"*movsi_zarch", "*movsi_esa", "*movdf_64", "*movdf_31", "movsf",
"*muldf3", "*muldf3_ibm", "*fmadddf", "*fmsubdf", "*mulsf3",
"mulsf3_ibm", "*fmaddsf", "fmsubsf", "*divdf3", "*divdf3_ibm",
"*negdf2_cc", "*negdf2_cconly", "*negdf2", "*negdf2_ibm",
"*negsf2_cc", "*negsf2_cconly", "*negsf2", "*absdf2_cc",
"*absdf2_cconly", "*absdf2", "*absdf2_ibm", "*abssf2_cc",
"*abssf2_cconly", "*abssf2", "*abssf2_ibm", "*negabsdf2_cc",
"*negabsdf2_cconly", "*negabsdf2", "*negabssf2_cc",
"*negabssf2_cconly", "*negabssf2", "sqrtdf2", "sqrtsf2"): Rename
'type' value.
("*divsf3"): Additionally rename second pattern to
"*divsf3_ibm".
("truncdfsf2_ibm", "extendsfdf2_ieee", "extendsfdf2_ibm",
"*adddf3", "*adddf3_cc", "*adddf3_cconly", "*adddf3_ibm",
"*addsf3", "*addsf3_cc", "*addsf3_cconly", "*subdf3",
"subdf3_cc", "*subdf3_cconly", "*subdf3_ibm", "*subsf3",
"subsf3_cc", "*subsf3_cconly", "*subsf3_ibm"): Merge identical
'type values' and rename 'type' value.
("*addsf3"): Additionally rename second pattern to
"*addsf3_ibm".
2005-05-09 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.md: ("SHIFT"): New mode macro.
("lr", "shift"): New mode attributes.
("ashldi3", "lshrdi3"): Merge.
......
......@@ -156,44 +156,44 @@
;; Floating point insns
;;
(define_insn_reservation "x_fsimpd" 6
(define_insn_reservation "x_fsimpdf" 6
(and (eq_attr "cpu" "z990")
(eq_attr "type" "fsimpd,fmuld"))
(eq_attr "type" "fsimpdf,fmuldf"))
"x_e1_t,x-wr-fp")
(define_insn_reservation "x_fsimps" 6
(define_insn_reservation "x_fsimpsf" 6
(and (eq_attr "cpu" "z990")
(eq_attr "type" "fsimps,fmuls"))
(eq_attr "type" "fsimpsf,fmulsf"))
"x_e1_t,x-wr-fp")
(define_insn_reservation "x_fdivd" 36
(define_insn_reservation "x_fdivdf" 36
(and (eq_attr "cpu" "z990")
(eq_attr "type" "fdivd,fsqrtd"))
(eq_attr "type" "fdivdf,fsqrtdf"))
"x_e1_t*30,x-wr-fp")
(define_insn_reservation "x_fdivs" 36
(define_insn_reservation "x_fdivsf" 36
(and (eq_attr "cpu" "z990")
(eq_attr "type" "fdivs,fsqrts"))
(eq_attr "type" "fdivsf,fsqrtsf"))
"x_e1_t*30,x-wr-fp")
(define_insn_reservation "x_floadd" 6
(define_insn_reservation "x_floaddf" 6
(and (eq_attr "cpu" "z990")
(eq_attr "type" "floadd"))
(eq_attr "type" "floaddf"))
"x_e1_t,x-wr-fp")
(define_insn_reservation "x_floads" 6
(define_insn_reservation "x_floadsf" 6
(and (eq_attr "cpu" "z990")
(eq_attr "type" "floads"))
(eq_attr "type" "floadsf"))
"x_e1_t,x-wr-fp")
(define_insn_reservation "x_fstored" 1
(define_insn_reservation "x_fstoredf" 1
(and (eq_attr "cpu" "z990")
(eq_attr "type" "fstored"))
(eq_attr "type" "fstoredf"))
"x_e1_t,x-wr-fp")
(define_insn_reservation "x_fstores" 1
(define_insn_reservation "x_fstoresf" 1
(and (eq_attr "cpu" "z990")
(eq_attr "type" "fstores"))
(eq_attr "type" "fstoresf"))
"x_e1_t,x-wr-fp")
(define_insn_reservation "x_ftoi" 1
......@@ -206,13 +206,13 @@
(eq_attr "type" "itof"))
"x_e1_t*3,x-wr-fp")
(define_bypass 1 "x_fsimpd" "x_fstored")
(define_bypass 1 "x_fsimpdf" "x_fstoredf")
(define_bypass 1 "x_fsimps" "x_fstores")
(define_bypass 1 "x_fsimpsf" "x_fstoresf")
(define_bypass 1 "x_floadd" "x_fsimpd,x_fstored,x_floadd")
(define_bypass 1 "x_floaddf" "x_fsimpdf,x_fstoredf,x_floaddf")
(define_bypass 1 "x_floads" "x_fsimps,x_fstores,x_floads")
(define_bypass 1 "x_floadsf" "x_fsimpsf,x_fstoresf,x_floadsf")
;;
;; s390_agen_dep_p returns 1, if a register is set in the
......@@ -229,8 +229,8 @@
"s390_agen_dep_p")
(define_bypass 9 "x_int,x_agen,x_lr"
"x_floadd, x_floads, x_fstored, x_fstores,\
x_fsimpd, x_fsimps, x_fdivd, x_fdivs"
"x_floaddf, x_floadsf, x_fstoredf, x_fstoresf,\
x_fsimpdf, x_fsimpsf, x_fdivdf, x_fdivsf"
"s390_agen_dep_p")
;;
;; A load type instruction uses a bypass to feed the result back
......@@ -242,8 +242,8 @@
"s390_agen_dep_p")
(define_bypass 5 "x_load"
"x_floadd, x_floads, x_fstored, x_fstores,\
x_fsimpd, x_fsimps, x_fdivd, x_fdivs"
"x_floaddf, x_floadsf, x_fstoredf, x_fstoresf,\
x_fsimpdf, x_fsimpsf, x_fdivdf, x_fdivsf"
"s390_agen_dep_p")
;;
......@@ -256,8 +256,8 @@
"s390_agen_dep_p")
(define_bypass 5 "x_larl, x_la"
"x_floadd, x_floads, x_fstored, x_fstores,\
x_fsimpd, x_fsimps, x_fdivd, x_fdivs"
"x_floaddf, x_floadsf, x_fstoredf, x_fstoresf,\
x_fsimpdf, x_fsimpsf, x_fdivdf, x_fdivsf"
"s390_agen_dep_p")
;;
......
......@@ -4211,8 +4211,8 @@ s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
switch (s390_safe_attr_type (insn))
{
case TYPE_FSTORED:
case TYPE_FSTORES:
case TYPE_FSTOREDF:
case TYPE_FSTORESF:
priority = priority << 3;
break;
case TYPE_STORE:
......
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