Commit cf8e1455 by David Edelsohn Committed by David Edelsohn

Revert rs6000 change.

From-SVN: r140646
parent 1547a820
2008-09-24 David Edelsohn <edelsohn@gnu.org>
Revert:
2008-09-24 Michael J. Eager <eager@eagercon.com>
2008-09-24 Aldy Hernandez <aldyh@redhat.com> 2008-09-24 Aldy Hernandez <aldyh@redhat.com>
* c-common.c (fname_decl): New location argument. * c-common.c (fname_decl): New location argument.
......
...@@ -1791,11 +1791,6 @@ powerpc-*-eabialtivec*) ...@@ -1791,11 +1791,6 @@ powerpc-*-eabialtivec*)
extra_options="${extra_options} rs6000/sysv4.opt" extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcendian rs6000/t-ppccomm" tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcendian rs6000/t-ppccomm"
;; ;;
powerpc-xilinx-eabi*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/singlefp.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
;;
powerpc-*-eabi*) powerpc-*-eabi*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h" tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h"
extra_options="${extra_options} rs6000/sysv4.opt" extra_options="${extra_options} rs6000/sysv4.opt"
......
...@@ -192,8 +192,7 @@ ...@@ -192,8 +192,7 @@
return 0; return 0;
/* Consider all constants with -msoft-float to be easy. */ /* Consider all constants with -msoft-float to be easy. */
if ((TARGET_SOFT_FLOAT || TARGET_E500_SINGLE if ((TARGET_SOFT_FLOAT || TARGET_E500_SINGLE)
|| (TARGET_HARD_FLOAT && (TARGET_SINGLE_FLOAT && ! TARGET_DOUBLE_FLOAT)))
&& mode != DImode) && mode != DImode)
return 1; return 1;
......
...@@ -297,8 +297,7 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile) ...@@ -297,8 +297,7 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
builtin_define ("__PAIRED__"); builtin_define ("__PAIRED__");
if (TARGET_SOFT_FLOAT) if (TARGET_SOFT_FLOAT)
builtin_define ("_SOFT_FLOAT"); builtin_define ("_SOFT_FLOAT");
if ((!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE))) if (!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)))
||(TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_DOUBLE_FLOAT))
builtin_define ("_SOFT_DOUBLE"); builtin_define ("_SOFT_DOUBLE");
/* Used by lwarx/stwcx. errata work-around. */ /* Used by lwarx/stwcx. errata work-around. */
if (rs6000_cpu == PROCESSOR_PPC405) if (rs6000_cpu == PROCESSOR_PPC405)
......
...@@ -298,17 +298,6 @@ enum processor_type ...@@ -298,17 +298,6 @@ enum processor_type
PROCESSOR_CELL PROCESSOR_CELL
}; };
/* FPU operations supported.
Each use of TARGET_SINGLE_FLOAT or TARGET_DOUBLE_FLOAT must
also test TARGET_HARD_FLOAT. */
#define TARGET_SINGLE_FLOAT 1
#define TARGET_DOUBLE_FLOAT 1
#define TARGET_SINGLE_FPU 0
#define TARGET_SIMPLE_FPU 0
#define TARGET_SINGLE_FLOAT_MODE(MODE) (TARGET_SINGLE_FLOAT && (MODE) == SFmode)
#define TARGET_DOUBLE_FLOAT_MODE(MODE) (TARGET_DOUBLE_FLOAT && (MODE) == DFmode)
extern enum processor_type rs6000_cpu; extern enum processor_type rs6000_cpu;
/* Recast the processor type to the cpu attribute. */ /* Recast the processor type to the cpu attribute. */
......
...@@ -260,15 +260,3 @@ Specify alignment of structure fields default/natural ...@@ -260,15 +260,3 @@ Specify alignment of structure fields default/natural
mprioritize-restricted-insns= mprioritize-restricted-insns=
Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority) Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority)
Specify scheduling priority for dispatch slot restricted insns Specify scheduling priority for dispatch slot restricted insns
msingle-float
Target RejectNegative Var(rs6000_single_float)
Single-precision floating point unit
mdouble-float
Target RejectNegative Var(rs6000_double_float)
Double-precision floating point unit
msimple-fpu
Target RejectNegative Var(rs6000_simple_fpu)
Floating point unit does not support divide & sqrt
...@@ -715,7 +715,6 @@ See RS/6000 and PowerPC Options. ...@@ -715,7 +715,6 @@ See RS/6000 and PowerPC Options.
-m64 -m32 -mxl-compat -mno-xl-compat -mpe @gol -m64 -m32 -mxl-compat -mno-xl-compat -mpe @gol
-malign-power -malign-natural @gol -malign-power -malign-natural @gol
-msoft-float -mhard-float -mmultiple -mno-multiple @gol -msoft-float -mhard-float -mmultiple -mno-multiple @gol
-msingle-float -mdouble-float -msimple-fpu @gol
-mstring -mno-string -mupdate -mno-update @gol -mstring -mno-string -mupdate -mno-update @gol
-mfused-madd -mno-fused-madd -mbit-align -mno-bit-align @gol -mfused-madd -mno-fused-madd -mbit-align -mno-bit-align @gol
-mstrict-align -mno-strict-align -mrelocatable @gol -mstrict-align -mno-strict-align -mrelocatable @gol
...@@ -13420,8 +13419,7 @@ following options: ...@@ -13420,8 +13419,7 @@ following options:
@gccoptlist{-maltivec -mfprnd -mhard-float -mmfcrf -mmultiple @gol @gccoptlist{-maltivec -mfprnd -mhard-float -mmfcrf -mmultiple @gol
-mnew-mnemonics -mpopcntb -mpower -mpower2 -mpowerpc64 @gol -mnew-mnemonics -mpopcntb -mpower -mpower2 -mpowerpc64 @gol
-mpowerpc-gpopt -mpowerpc-gfxopt -msingle-float -mdouble-float @gol -mpowerpc-gpopt -mpowerpc-gfxopt -mstring -mmulhw -mdlmzb -mmfpgpr}
-msimple-fpu -mstring -mmulhw -mdlmzb -mmfpgpr}
The particular options set for any particular CPU will vary between The particular options set for any particular CPU will vary between
compiler versions, depending on what setting seems to produce optimal compiler versions, depending on what setting seems to produce optimal
...@@ -13638,17 +13636,6 @@ Generate code that does not use (uses) the floating-point register set. ...@@ -13638,17 +13636,6 @@ Generate code that does not use (uses) the floating-point register set.
Software floating point emulation is provided if you use the Software floating point emulation is provided if you use the
@option{-msoft-float} option, and pass the option to GCC when linking. @option{-msoft-float} option, and pass the option to GCC when linking.
@item -msingle-float
@itemx -mdouble-float
@opindex msingle-float
@opindex mdouble-float
Generate code for single or double-precision floating point operations.
@option{-mdouble-float} implies @option{-msingle-float}.
@item -msimple-fpu
@opindex msimple-fpu
Do not generate sqrt and div instructions for hardware floating point unit.
@item -mmultiple @item -mmultiple
@itemx -mno-multiple @itemx -mno-multiple
@opindex mmultiple @opindex mmultiple
......
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