Commit cedbd764 by Jan Sjodin Committed by Jan Sjodin

2008-01-08 Jan Sjodin <jan.sjodin@amd.com>

       * config/i386/i386.c:
        (k8_cost, amdfam10_cost): Branch costs for vectorization tuned.

From-SVN: r131401
parent a9990582
2008-01-08 Jan Sjodin <jan.sjodin@amd.com>
* config/i386/i386.c:
(k8_cost, amdfam10_cost): Branch costs for vectorization tuned.
2008-01-08 Richard Guenther <rguenther@suse.de> 2008-01-08 Richard Guenther <rguenther@suse.de>
PR tree-optimization/34683 PR tree-optimization/34683
...@@ -701,7 +701,7 @@ struct processor_costs k8_cost = { ...@@ -701,7 +701,7 @@ struct processor_costs k8_cost = {
to limit number of prefetches at all, as their execution also takes some to limit number of prefetches at all, as their execution also takes some
time). */ time). */
100, /* number of parallel prefetches */ 100, /* number of parallel prefetches */
5, /* Branch cost */ 3, /* Branch cost */
COSTS_N_INSNS (4), /* cost of FADD and FSUB insns. */ COSTS_N_INSNS (4), /* cost of FADD and FSUB insns. */
COSTS_N_INSNS (4), /* cost of FMUL instruction. */ COSTS_N_INSNS (4), /* cost of FMUL instruction. */
COSTS_N_INSNS (19), /* cost of FDIV instruction. */ COSTS_N_INSNS (19), /* cost of FDIV instruction. */
...@@ -725,8 +725,8 @@ struct processor_costs k8_cost = { ...@@ -725,8 +725,8 @@ struct processor_costs k8_cost = {
2, /* vec_align_load_cost. */ 2, /* vec_align_load_cost. */
3, /* vec_unalign_load_cost. */ 3, /* vec_unalign_load_cost. */
3, /* vec_store_cost. */ 3, /* vec_store_cost. */
6, /* cond_taken_branch_cost. */ 3, /* cond_taken_branch_cost. */
1, /* cond_not_taken_branch_cost. */ 2, /* cond_not_taken_branch_cost. */
}; };
struct processor_costs amdfam10_cost = { struct processor_costs amdfam10_cost = {
...@@ -787,7 +787,7 @@ struct processor_costs amdfam10_cost = { ...@@ -787,7 +787,7 @@ struct processor_costs amdfam10_cost = {
to limit number of prefetches at all, as their execution also takes some to limit number of prefetches at all, as their execution also takes some
time). */ time). */
100, /* number of parallel prefetches */ 100, /* number of parallel prefetches */
5, /* Branch cost */ 2, /* Branch cost */
COSTS_N_INSNS (4), /* cost of FADD and FSUB insns. */ COSTS_N_INSNS (4), /* cost of FADD and FSUB insns. */
COSTS_N_INSNS (4), /* cost of FMUL instruction. */ COSTS_N_INSNS (4), /* cost of FMUL instruction. */
COSTS_N_INSNS (19), /* cost of FDIV instruction. */ COSTS_N_INSNS (19), /* cost of FDIV instruction. */
...@@ -812,7 +812,7 @@ struct processor_costs amdfam10_cost = { ...@@ -812,7 +812,7 @@ struct processor_costs amdfam10_cost = {
2, /* vec_align_load_cost. */ 2, /* vec_align_load_cost. */
2, /* vec_unalign_load_cost. */ 2, /* vec_unalign_load_cost. */
2, /* vec_store_cost. */ 2, /* vec_store_cost. */
6, /* cond_taken_branch_cost. */ 2, /* cond_taken_branch_cost. */
1, /* cond_not_taken_branch_cost. */ 1, /* cond_not_taken_branch_cost. */
}; };
......
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