Commit cebcfdc8 by Stephane Carrez Committed by Stephane Carrez

* config/m68hc11/m68hc11-protos.h

	(m68hc11_eq_compare_operator): Declare
	* config/m68hc11/m68hc11.h (PREDICATE_CODES): Register new predicate.
	* config/m68hc11/m68hc11.c (m68hc11_eq_compare_operator): New predicate
	(d_register_operand): Check the operand mode.
	(hard_addr_reg_operand): Likewise.

From-SVN: r65529
parent 0ae32ec0
2003-04-12 Stephane Carrez <stcarrez@nerim.fr> 2003-04-12 Stephane Carrez <stcarrez@nerim.fr>
* config/m68hc11/m68hc11-protos.h
(m68hc11_eq_compare_operator): Declare
* config/m68hc11/m68hc11.h (PREDICATE_CODES): Register new predicate.
* config/m68hc11/m68hc11.c (m68hc11_eq_compare_operator): New predicate
(d_register_operand): Check the operand mode.
(hard_addr_reg_operand): Likewise.
2003-04-12 Stephane Carrez <stcarrez@nerim.fr>
* config/m68hc11/m68hc11.md ("decrement_and_branch_until_zero"): New * config/m68hc11/m68hc11.md ("decrement_and_branch_until_zero"): New
pattern for dbcc/ibcc generation for 68HC12. pattern for dbcc/ibcc generation for 68HC12.
("doloop_end"): New pattern. ("doloop_end"): New pattern.
......
...@@ -120,6 +120,7 @@ extern int m68hc11_arith_operator PARAMS((rtx, enum machine_mode)); ...@@ -120,6 +120,7 @@ extern int m68hc11_arith_operator PARAMS((rtx, enum machine_mode));
extern int m68hc11_non_shift_operator PARAMS((rtx, enum machine_mode)); extern int m68hc11_non_shift_operator PARAMS((rtx, enum machine_mode));
extern int m68hc11_shift_operator PARAMS((rtx, enum machine_mode)); extern int m68hc11_shift_operator PARAMS((rtx, enum machine_mode));
extern int m68hc11_unary_operator PARAMS((rtx, enum machine_mode)); extern int m68hc11_unary_operator PARAMS((rtx, enum machine_mode));
extern int m68hc11_eq_compare_operator PARAMS((rtx, enum machine_mode));
extern int non_push_operand PARAMS((rtx, enum machine_mode)); extern int non_push_operand PARAMS((rtx, enum machine_mode));
extern int hard_reg_operand PARAMS((rtx, enum machine_mode)); extern int hard_reg_operand PARAMS((rtx, enum machine_mode));
extern int soft_reg_operand PARAMS((rtx, enum machine_mode)); extern int soft_reg_operand PARAMS((rtx, enum machine_mode));
......
...@@ -1026,6 +1026,9 @@ d_register_operand (operand, mode) ...@@ -1026,6 +1026,9 @@ d_register_operand (operand, mode)
rtx operand; rtx operand;
enum machine_mode mode ATTRIBUTE_UNUSED; enum machine_mode mode ATTRIBUTE_UNUSED;
{ {
if (GET_MODE (operand) != mode && mode != VOIDmode)
return 0;
if (GET_CODE (operand) == SUBREG) if (GET_CODE (operand) == SUBREG)
operand = XEXP (operand, 0); operand = XEXP (operand, 0);
...@@ -1040,6 +1043,9 @@ hard_addr_reg_operand (operand, mode) ...@@ -1040,6 +1043,9 @@ hard_addr_reg_operand (operand, mode)
rtx operand; rtx operand;
enum machine_mode mode ATTRIBUTE_UNUSED; enum machine_mode mode ATTRIBUTE_UNUSED;
{ {
if (GET_MODE (operand) != mode && mode != VOIDmode)
return 0;
if (GET_CODE (operand) == SUBREG) if (GET_CODE (operand) == SUBREG)
operand = XEXP (operand, 0); operand = XEXP (operand, 0);
...@@ -1132,6 +1138,14 @@ symbolic_memory_operand (op, mode) ...@@ -1132,6 +1138,14 @@ symbolic_memory_operand (op, mode)
} }
int int
m68hc11_eq_compare_operator (op, mode)
register rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return GET_CODE (op) == EQ || GET_CODE (op) == NE;
}
int
m68hc11_logical_operator (op, mode) m68hc11_logical_operator (op, mode)
register rtx op; register rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED; enum machine_mode mode ATTRIBUTE_UNUSED;
......
...@@ -1665,6 +1665,7 @@ do { \ ...@@ -1665,6 +1665,7 @@ do { \
{"m68hc11_non_shift_operator", {AND, IOR, XOR, PLUS, MINUS}}, \ {"m68hc11_non_shift_operator", {AND, IOR, XOR, PLUS, MINUS}}, \
{"m68hc11_unary_operator", {NEG, NOT, SIGN_EXTEND, ZERO_EXTEND}}, \ {"m68hc11_unary_operator", {NEG, NOT, SIGN_EXTEND, ZERO_EXTEND}}, \
{"m68hc11_shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT}},\ {"m68hc11_shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT}},\
{"m68hc11_eq_compare_operator", {EQ, NE}}, \
{"non_push_operand", {SUBREG, REG, MEM}}, \ {"non_push_operand", {SUBREG, REG, MEM}}, \
{"reg_or_some_mem_operand", {SUBREG, REG, MEM}}, \ {"reg_or_some_mem_operand", {SUBREG, REG, MEM}}, \
{"tst_operand", {SUBREG, REG, MEM}}, \ {"tst_operand", {SUBREG, REG, MEM}}, \
......
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