Commit ceaca33e by John David Anglin Committed by John David Anglin

re PR target/56214 (FAIL: gcc.c-torture/execute/20050121-1.c compilation, ICE)

	PR target/56214
	* config/pa/predicates.md (base14_operand): Except for BLKmode, QImode
	and HImode, require all displacements to be an integer multiple of the
	mode size.
	* config/pa/pa.c (pa_legitimate_address_p): For REG+BASE addresses,
	only allow QImode and HImode when reload is in progress and strict is
	true.  Likewise for symbolic addresses.  Use base14_operand to check
	displacements in REG+BASE addresses.

From-SVN: r196122
parent fe0b4796
2013-02-18 John David Anglin <dave.anglin@nrc-cnrc.ca>
PR target/56214
* config/pa/predicates.md (base14_operand): Except for BLKmode, QImode
and HImode, require all displacements to be an integer multiple of their
mode size.
* config/pa/pa.c (pa_legitimate_address_p): For REG+BASE addresses,
only allow QImode and HImode when reload is in progress and strict is
true. Likewise for symbolic addresses. Use base14_operand to check
displacements in REG+BASE addresses.
2013-02-18 Richard Biener <rguenther@suse.de> 2013-02-18 Richard Biener <rguenther@suse.de>
PR tree-optimization/56366 PR tree-optimization/56366
......
...@@ -10517,21 +10517,13 @@ pa_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) ...@@ -10517,21 +10517,13 @@ pa_legitimate_address_p (enum machine_mode mode, rtx x, bool strict)
the majority of accesses will use floating point instructions the majority of accesses will use floating point instructions
that don't support 14-bit offsets. */ that don't support 14-bit offsets. */
if (!INT14_OK_STRICT if (!INT14_OK_STRICT
&& (GET_MODE_CLASS (mode) == MODE_FLOAT && reload_in_progress
|| (reload_in_progress && strict
&& strict && mode != QImode
&& (mode == SImode || mode == DImode)))) && mode != HImode)
return false; return false;
if (INT_14_BITS (index)
&& (mode == BLKmode
|| mode == QImode
|| mode == HImode
/* Displacement must be a multiple of its size. */
|| (INTVAL (index) % GET_MODE_SIZE (mode)) == 0))
return true;
return false; return base14_operand (index, mode);
} }
if (!TARGET_DISABLE_INDEXING if (!TARGET_DISABLE_INDEXING
...@@ -10586,11 +10578,11 @@ pa_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) ...@@ -10586,11 +10578,11 @@ pa_legitimate_address_p (enum machine_mode mode, rtx x, bool strict)
return true; return true;
if (!INT14_OK_STRICT if (!INT14_OK_STRICT
&& (GET_MODE_CLASS (mode) == MODE_FLOAT && reload_in_progress
|| (reload_in_progress && strict
&& strict && mode != QImode
&& (mode == SImode || mode == DImode)))) && mode != HImode)
return false; return false;
if (CONSTANT_P (XEXP (x, 1))) if (CONSTANT_P (XEXP (x, 1)))
return true; return true;
......
...@@ -272,22 +272,13 @@ ...@@ -272,22 +272,13 @@
assumed in the instruction encoding. */ assumed in the instruction encoding. */
switch (mode) switch (mode)
{ {
case BLKmode:
case QImode: case QImode:
case HImode: case HImode:
return true; return true;
case SImode:
case SFmode:
case SCmode:
return (INTVAL (op) % 4) == 0;
case DImode:
case DFmode:
case DCmode:
return (INTVAL (op) % 8) == 0;
default: default:
break; return (INTVAL (op) % GET_MODE_SIZE (mode)) == 0;
} }
return false; return false;
......
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