sparc.md (cmp_zero_qi, [...]): New patterns.

	* config/sparc/sparc.md (cmp_zero_qi,
	cmp_zero_extendqisi2_andcc_set, cmp_zero_qi_sp64,
	cmp_zero_extendqidi2_andcc_set): New patterns.

From-SVN: r31108

gcc/ChangeLog

+1999-12-27  Jakub Jelinek  <jakub@redhat.com>
+
+	* config/sparc/sparc.md (cmp_zero_qi,
+	cmp_zero_extendqisi2_andcc_set, cmp_zero_qi_sp64,
+	cmp_zero_extendqidi2_andcc_set): New patterns.
+
 1999-12-28  Manfred Hollstein  <mhollstein@cygnus.com>
 
 	* m68k/t-mot3300-gald (CROSS_LIBGCC1): Define to libgcc1-asm.a.

gcc/config/sparc/sparc.md

@@ -4489,6 +4489,15 @@
   [(set_attr "type" "compare")
    (set_attr "length" "1")])
 
+(define_insn "*cmp_zero_qi"
+  [(set (reg:CC 100)
+	(compare:CC (match_operand:QI 0 "register_operand" "r")
+		    (const_int 0)))]
+  "! TARGET_LIVE_G0"
+  "andcc\\t%0, 0xff, %%g0"
+  [(set_attr "type" "compare")
+   (set_attr "length" "1")])
+
 (define_insn "*cmp_zero_extendqisi2_set"
   [(set (reg:CC 100)
 	(compare:CC (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
@@ -4500,6 +4509,18 @@
   [(set_attr "type" "compare")
    (set_attr "length" "1")])
 
+(define_insn "*cmp_zero_extendqisi2_andcc_set"
+  [(set (reg:CC 100)
+	(compare:CC (and:SI (match_operand:SI 1 "register_operand" "r")
+			    (const_int 255))
+		    (const_int 0)))
+   (set (match_operand:SI 0 "register_operand" "=r")
+	(zero_extend:SI (subreg:QI (match_dup 1) 0)))]
+  ""
+  "andcc\\t%1, 0xff, %0"
+  [(set_attr "type" "compare")
+   (set_attr "length" "1")])
+
 (define_insn "*cmp_zero_extendqidi2"
   [(set (reg:CCX 100)
 	(compare:CCX (zero_extend:DI (match_operand:QI 0 "register_operand" "r"))
@@ -4509,6 +4530,15 @@
   [(set_attr "type" "compare")
    (set_attr "length" "1")])
 
+(define_insn "*cmp_zero_qi_sp64"
+  [(set (reg:CCX 100)
+	(compare:CCX (match_operand:QI 0 "register_operand" "r")
+		     (const_int 0)))]
+  "TARGET_ARCH64"
+  "andcc\\t%0, 0xff, %%g0"
+  [(set_attr "type" "compare")
+   (set_attr "length" "1")])
+
 (define_insn "*cmp_zero_extendqidi2_set"
   [(set (reg:CCX 100)
 	(compare:CCX (zero_extend:DI (match_operand:QI 1 "register_operand" "r"))
@@ -4520,6 +4550,18 @@
   [(set_attr "type" "compare")
    (set_attr "length" "1")])
 
+(define_insn "*cmp_zero_extendqidi2_andcc_set"
+  [(set (reg:CCX 100)
+	(compare:CCX (and:DI (match_operand:DI 1 "register_operand" "r")
+			     (const_int 255))
+		     (const_int 0)))
+   (set (match_operand:DI 0 "register_operand" "=r")
+	(zero_extend:DI (subreg:QI (match_dup 1) 0)))]
+  "TARGET_ARCH64"
+  "andcc\\t%1, 0xff, %0"
+  [(set_attr "type" "compare")
+   (set_attr "length" "1")])
+
 ;; Similarly, handle {SI,DI}->QI mode truncation followed by a compare.
 
 (define_insn "*cmp_siqi_trunc"