Commit cc1719e8 by Monk Chiang Committed by Chung-Ju Wu

nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Consider TARGET_CPU_DEFAULT settings.

2013-12-19  Monk Chiang  <sh.chiang04@gmail.com>

gcc/
	* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
	Consider TARGET_CPU_DEFAULT settings.

From-SVN: r206106
parent 4d8ba6ec
2013-12-19 Monk Chiang <sh.chiang04@gmail.com>
* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
Consider TARGET_CPU_DEFAULT settings.
2013-12-18 James Greenhalgh <james.greenhalgh@arm.com> 2013-12-18 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-cores.def: Add support for * config/aarch64/aarch64-cores.def: Add support for
...@@ -86,14 +86,23 @@ static const struct default_options nds32_option_optimization_table[] = ...@@ -86,14 +86,23 @@ static const struct default_options nds32_option_optimization_table[] =
/* Run-time Target Specification. */ /* Run-time Target Specification. */
/* Default enable /* The default target flags consist of
TARGET_CPU_DEFAULT and other MASK_XXX flags.
The value of TARGET_CPU_DEFAULT is set by
the process of 'configure' and 'make' stage.
Please check gcc/config.gcc for more implementation detail.
Other MASK_XXX flags are set individually.
By default we enable
TARGET_GP_DIRECT: Generate gp-imply instruction. TARGET_GP_DIRECT: Generate gp-imply instruction.
TARGET_16_BIT : Generate 16/32 bit mixed length instruction. TARGET_16_BIT : Generate 16/32 bit mixed length instruction.
TARGET_PERF_EXT : Generate performance extention instrcution. TARGET_PERF_EXT : Generate performance extention instrcution.
TARGET_CMOV : Generate conditional move instruction. */ TARGET_CMOV : Generate conditional move instruction. */
#undef TARGET_DEFAULT_TARGET_FLAGS #undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS \ #define TARGET_DEFAULT_TARGET_FLAGS \
(MASK_GP_DIRECT \ (TARGET_CPU_DEFAULT \
| MASK_GP_DIRECT \
| MASK_16_BIT \ | MASK_16_BIT \
| MASK_PERF_EXT \ | MASK_PERF_EXT \
| MASK_CMOV) | MASK_CMOV)
......
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