Commit cbb734aa by Uros Bizjak

i386.md (ssemodesuffix): Merge with ssevecsize, ssemodefsuffix,…

i386.md (ssemodesuffix): Merge with ssevecsize, ssemodefsuffix, ssescalarmodesuffix and avxmodesuffixp.

	* config/i386/i386.md (ssemodesuffix):  Merge with ssevecsize,
	ssemodefsuffix, ssescalarmodesuffix and avxmodesuffixp.
	Move from sse.md.
	(ssemodefsuffix): Remove.
	(ssevecmodesuffix): New mode attribute.
	(fix_trunc<mode>di_sse, fix_trunc<mode>si_sse,
	*float<SSEMODEI24:mode><MODEF:mode>2_mixed_interunit,
	*float<SSEMODEI24:mode><MODEF:mode>2_mixed_nointerunit,
	*float<SSEMODEI24:mode><MODEF:mode>2_sse_interunit,
	*float<SSEMODEI24:mode><MODEF:mode>2_sse_nointerunit, setcc_<mode>_sse,
	*sqrt<mode>2_sse, sse4_1_round<mode>2, <smaxmin:code><mode>3,
	*ieee_smin<mode>3, *ieee_smax<mode>3): Adjust assembler templates for
	ssemodesuffix mode attribute.
	(float splitters): Use ssevecmodesuffix mode attribute.
	* config/i386/sse.md (ssescalarmode): Merge with avxscalarmode.
	(sseinsmode): Rename from avxvecmode.
	(avxsizesuffix): Rename from avxmodesuffix.
	(sseintvecmode): Rename from avxpermvecmode.
	(ssedoublevecmode): Rename from ssedoublesizemode.
	(ssehalfvecmode): Rename from avxhalfvecmode.
	(ssescalarmode): Rename from avxscalarmode.
	(<sse>_comi, <sse>_ucomi, sse4a_movnt<mode>): Adjust assembler
	templates for ssemodesuffix mode attribute.
	(*andnot<mode>3, *<any_logic:code><mode>3): Use ssevecmodesuffix
	mode attribute.

	Adjust RTX patterns globally for renamed mode attributes.

From-SVN: r173043
parent 991278ab
2011-04-27 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (ssemodesuffix): Merge with ssevecsize,
ssemodefsuffix, ssescalarmodesuffix and avxmodesuffixp.
Move from sse.md.
(ssemodefsuffix): Remove.
(ssevecmodesuffix): New mode attribute.
(fix_trunc<mode>di_sse, fix_trunc<mode>si_sse,
*float<SSEMODEI24:mode><MODEF:mode>2_mixed_interunit,
*float<SSEMODEI24:mode><MODEF:mode>2_mixed_nointerunit,
*float<SSEMODEI24:mode><MODEF:mode>2_sse_interunit,
*float<SSEMODEI24:mode><MODEF:mode>2_sse_nointerunit, setcc_<mode>_sse,
*sqrt<mode>2_sse, sse4_1_round<mode>2, <smaxmin:code><mode>3,
*ieee_smin<mode>3, *ieee_smax<mode>3): Adjust assembler templates for
ssemodesuffix mode attribute.
(float splitters): Use ssevecmodesuffix mode attribute.
* config/i386/sse.md (ssescalarmode): Merge with avxscalarmode.
(sseinsmode): Rename from avxvecmode.
(avxsizesuffix): Rename from avxmodesuffix.
(sseintvecmode): Rename from avxpermvecmode.
(ssedoublevecmode): Rename from ssedoublesizemode.
(ssehalfvecmode): Rename from avxhalfvecmode.
(ssescalarmode): Rename from avxscalarmode.
(<sse>_comi, <sse>_ucomi, sse4a_movnt<mode>): Adjust assembler
templates for ssemodesuffix mode attribute.
(*andnot<mode>3, *<any_logic:code><mode>3): Use ssevecmodesuffix
mode attribute.
Adjust RTX patterns globally for renamed mode attributes.
2011-04-27 Jan Hubcika <jh@suse.cz>
* ipa-inline.h (struct inline_edge_summary): Add predicate pointer.
......@@ -18,8 +48,7 @@
(edge_set_predicate): New function.
(inline_edge_duplication_hook): Duplicate edge predicates.
(inline_edge_removal_hook): Free edge predicates.
(dump_inline_edge_summary): Add INFO parameter; dump
edge predicates.
(dump_inline_edge_summary): Add INFO parameter; dump edge predicates.
(dump_inline_summary): Update.
(estimate_function_body_sizes): Set edge predicates.
(estimate_calls_size_and_time): Handle predicates.
......
......@@ -934,8 +934,16 @@
;; All integer modes handled by SSE cvtts?2si* operators.
(define_mode_iterator SSEMODEI24 [SI DI])
;; SSE asm suffix for floating point modes
(define_mode_attr ssemodefsuffix [(SF "s") (DF "d")])
;; SSE instruction suffix for various modes
(define_mode_attr ssemodesuffix
[(SF "ss") (DF "sd")
(V8SF "ps") (V4DF "pd")
(V4SF "ps") (V2DF "pd")
(V16QI "b") (V8HI "w") (V4SI "d") (V2DI "q")
(V8SI "si")])
;; SSE vector suffix for floating point modes
(define_mode_attr ssevecmodesuffix [(SF "ps") (DF "pd")])
;; SSE vector mode corresponding to a scalar mode
(define_mode_attr ssevecmode
......@@ -4610,7 +4618,7 @@
(fix:DI (match_operand:MODEF 1 "nonimmediate_operand" "x,m")))]
"TARGET_64BIT && SSE_FLOAT_MODE_P (<MODE>mode)
&& (!TARGET_FISTTP || TARGET_SSE_MATH)"
"%vcvtts<ssemodefsuffix>2si{q}\t{%1, %0|%0, %1}"
"%vcvtt<ssemodesuffix>2si{q}\t{%1, %0|%0, %1}"
[(set_attr "type" "sseicvt")
(set_attr "prefix" "maybe_vex")
(set_attr "prefix_rex" "1")
......@@ -4624,7 +4632,7 @@
(fix:SI (match_operand:MODEF 1 "nonimmediate_operand" "x,m")))]
"SSE_FLOAT_MODE_P (<MODE>mode)
&& (!TARGET_FISTTP || TARGET_SSE_MATH)"
"%vcvtts<ssemodefsuffix>2si\t{%1, %0|%0, %1}"
"%vcvtt<ssemodesuffix>2si\t{%1, %0|%0, %1}"
[(set_attr "type" "sseicvt")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "<MODE>")
......@@ -5124,8 +5132,8 @@
&& (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))"
"@
fild%Z1\t%1
%vcvtsi2s<MODEF:ssemodefsuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}
%vcvtsi2s<MODEF:ssemodefsuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}"
%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}
%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "fmov,sseicvt,sseicvt")
(set_attr "prefix" "orig,maybe_vex,maybe_vex")
(set_attr "mode" "<MODEF:MODE>")
......@@ -5150,7 +5158,7 @@
&& !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))"
"@
fild%Z1\t%1
%vcvtsi2s<MODEF:ssemodefsuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}"
%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "fmov,sseicvt")
(set_attr "prefix" "orig,maybe_vex")
(set_attr "mode" "<MODEF:MODE>")
......@@ -5230,7 +5238,7 @@
CONST0_RTX (V4SImode), operands[2]));
}
emit_insn
(gen_sse2_cvtdq2p<ssemodefsuffix> (operands[3], operands[4]));
(gen_sse2_cvtdq2<ssevecmodesuffix> (operands[3], operands[4]));
DONE;
})
......@@ -5253,7 +5261,7 @@
emit_insn (gen_sse2_loadld (operands[4],
CONST0_RTX (V4SImode), operands[1]));
emit_insn
(gen_sse2_cvtdq2p<ssemodefsuffix> (operands[3], operands[4]));
(gen_sse2_cvtdq2<ssevecmodesuffix> (operands[3], operands[4]));
DONE;
})
......@@ -5288,7 +5296,7 @@
else
gcc_unreachable ();
emit_insn
(gen_sse2_cvtdq2p<ssemodefsuffix> (operands[3], operands[4]));
(gen_sse2_cvtdq2<ssevecmodesuffix> (operands[3], operands[4]));
DONE;
})
......@@ -5310,7 +5318,7 @@
emit_insn (gen_sse2_loadld (operands[4],
CONST0_RTX (V4SImode), operands[1]));
emit_insn
(gen_sse2_cvtdq2p<ssemodefsuffix> (operands[3], operands[4]));
(gen_sse2_cvtdq2<ssevecmodesuffix> (operands[3], operands[4]));
DONE;
})
......@@ -5336,7 +5344,7 @@
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))"
"%vcvtsi2s<MODEF:ssemodefsuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}"
"%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "sseicvt")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "<MODEF:MODE>")
......@@ -5371,7 +5379,7 @@
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))"
"%vcvtsi2s<MODEF:ssemodefsuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}"
"%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "sseicvt")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "<MODEF:MODE>")
......@@ -10729,8 +10737,8 @@
(match_operand:MODEF 2 "nonimmediate_operand" "xm,xm")]))]
"SSE_FLOAT_MODE_P (<MODE>mode)"
"@
cmp%D3s<ssemodefsuffix>\t{%2, %0|%0, %2}
vcmp%D3s<ssemodefsuffix>\t{%2, %1, %0|%0, %1, %2}"
cmp%D3<ssemodesuffix>\t{%2, %0|%0, %2}
vcmp%D3<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "isa" "noavx,avx")
(set_attr "type" "ssecmp")
(set_attr "length_immediate" "1")
......@@ -13324,7 +13332,7 @@
(sqrt:MODEF
(match_operand:MODEF 1 "nonimmediate_operand" "xm")))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
"%vsqrts<ssemodefsuffix>\t{%1, %d0|%d0, %1}"
"%vsqrt<ssemodesuffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "sse")
(set_attr "atom_sse_attr" "sqrt")
(set_attr "prefix" "maybe_vex")
......@@ -14498,7 +14506,7 @@
(match_operand:SI 2 "const_0_to_15_operand" "n")]
UNSPEC_ROUND))]
"TARGET_ROUND"
"%vrounds<ssemodefsuffix>\t{%2, %1, %d0|%d0, %1, %2}"
"%vround<ssemodesuffix>\t{%2, %1, %d0|%d0, %1, %2}"
[(set_attr "type" "ssecvt")
(set_attr "prefix_extra" "1")
(set_attr "prefix" "maybe_vex")
......@@ -16413,8 +16421,8 @@
(match_operand:MODEF 2 "nonimmediate_operand" "xm,xm")))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
"@
<maxmin_float>s<ssemodefsuffix>\t{%2, %0|%0, %2}
v<maxmin_float>s<ssemodefsuffix>\t{%2, %1, %0|%0, %1, %2}"
<maxmin_float><ssemodesuffix>\t{%2, %0|%0, %2}
v<maxmin_float><ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "isa" "noavx,avx")
(set_attr "prefix" "orig,vex")
(set_attr "type" "sseadd")
......@@ -16434,8 +16442,8 @@
UNSPEC_IEEE_MIN))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
"@
mins<ssemodefsuffix>\t{%2, %0|%0, %2}
vmins<ssemodefsuffix>\t{%2, %1, %0|%0, %1, %2}"
min<ssemodesuffix>\t{%2, %0|%0, %2}
vmin<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "isa" "noavx,avx")
(set_attr "prefix" "orig,vex")
(set_attr "type" "sseadd")
......@@ -16449,8 +16457,8 @@
UNSPEC_IEEE_MAX))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
"@
maxs<ssemodefsuffix>\t{%2, %0|%0, %2}
vmaxs<ssemodefsuffix>\t{%2, %1, %0|%0, %1, %2}"
max<ssemodesuffix>\t{%2, %0|%0, %2}
vmax<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "isa" "noavx,avx")
(set_attr "prefix" "orig,vex")
(set_attr "type" "sseadd")
......
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