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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
cb6c1cf1
Commit
cb6c1cf1
authored
Feb 06, 1994
by
Jim Wilson
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(movdi): Handle 'U' and 'T' constraints.
From-SVN: r6491
parent
f7fcfd3f
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gcc/config/sparc/sparc.md
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gcc/config/sparc/sparc.md
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cb6c1cf1
...
...
@@ -1009,8 +1009,8 @@
}")
(define_insn ""
[
(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand" "=r,Q,r,r,?f,?f,?Q")
(match_operand:DI 1 "general_operand" "r,r,Q,i,f,Q,f"))]
[
(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand" "=r,
T,U,
Q,r,r,?f,?f,?Q")
(match_operand:DI 1 "general_operand" "r,
U,T,
r,Q,i,f,Q,f"))]
"register_operand (operands
[
0
]
, DImode)
|| register_operand (operands
[
1
]
, DImode)
|| operands
[
1
]
== const0_rtx"
...
...
@@ -1020,8 +1020,8 @@
return output_fp_move_double (operands);
return output_move_double (operands);
}"
[
(set_attr "type" "move,store,load,multi,fp,fpload,fpstore")
(set_attr "length" "2,3,3,3,2,3,3")])
[
(set_attr "type" "move,store,load,
store,load,
multi,fp,fpload,fpstore")
(set_attr "length" "2,
1,1,
3,3,3,2,3,3")])
(define_insn ""
[
(set (match_operand:DI 0 "register_operand" "=r")
...
...
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