Skip to content

R
riscv-gcc-1
Commit cafe096b by Eric Christopher
Options

Merge from rewrite branch. 

From-SVN: r66318
parent 6481daa9
Showing with 55 additions and 30 deletions
gcc/combine.c
......@@ -1437,7 +1437,7 @@ cant_combine_insn_p (insn)
/* Never combine loads and stores involving hard regs that are likely
to be spilled. The register allocator can usually handle such
reg-reg moves by tying. If we allow the combiner to make
reg-reg moves by tying. If we allow the combiner to make
substitutions of likely-spilled regs, we may abort in reload.
As an exception, we allow combinations involving fixed regs; these are
not available to the register allocator so there's no risk involved. */
......@@ -10159,6 +10159,14 @@ gen_lowpart_for_combine (mode, x)
if (GET_MODE (x) == mode)
return x;
/* Return identity if this is a CONST or symbolic
reference. */
if (mode == Pmode
&& (GET_CODE (x) == CONST
|| GET_CODE (x) == SYMBOL_REF
|| GET_CODE (x) == LABEL_REF))
return x;
/* We can only support MODE being wider than a word if X is a
constant integer or has a mode the same size. */
......@@ -10242,6 +10250,8 @@ gen_lowpart_for_combine (mode, x)
{
sub_mode = int_mode_for_mode (mode);
x = gen_lowpart_common (sub_mode, x);
if (x == 0)
return gen_rtx_CLOBBER (VOIDmode, const0_rtx);
}
res = simplify_gen_subreg (mode, x, sub_mode, offset);
if (res)
......
gcc/config/mips/5400.md
......@@ -64,7 +64,7 @@
(define_insn_reservation "ir_vr54_arith" 1
(and (eq_attr "cpu" "r5400")
(eq_attr "type" "arith,darith,icmp,nop"))
(eq_attr "type" "arith,darith,const,icmp,nop"))
"vr54_dp0|vr54_dp1")
(define_insn_reservation "ir_vr54_imul_si" 3
......
gcc/config/mips/5500.md
......@@ -57,7 +57,7 @@
(define_insn_reservation "ir_vr55_arith" 1
(and (eq_attr "cpu" "r5500")
(eq_attr "type" "arith,darith,icmp,nop"))
(eq_attr "type" "arith,darith,const,icmp,nop"))
"vr55_dp0|vr55_dp1")
(define_insn_reservation "ir_vr55_imul_si" 3
......
gcc/config/mips/elf.h
......@@ -234,12 +234,7 @@ void FN () \
#define LIB_SPEC ""
#undef STARTFILE_SPEC
#if defined(HAVE_MIPS_LIBGLOSS_STARTUP_DIRECTIVES) \
|| (MIPS_ABI_DEFAULT == ABI_MEABI)
#define STARTFILE_SPEC "crti%O%s crtbegin%O%s"
#else
#define STARTFILE_SPEC "crti%O%s crtbegin%O%s %{!mno-crt0:crt0%O%s}"
#endif
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend%O%s crtn%O%s"
......
gcc/config/mips/elf64.h
......@@ -192,12 +192,7 @@ void FN () \
#define LIB_SPEC ""
#undef STARTFILE_SPEC
#if defined(HAVE_MIPS_LIBGLOSS_STARTUP_DIRECTIVES) \
|| (MIPS_ABI_DEFAULT == ABI_MEABI)
#define STARTFILE_SPEC "crti%O%s crtbegin%O%s"
#else
#define STARTFILE_SPEC "crti%O%s crtbegin%O%s %{!mno-crt0:crt0%O%s}"
#endif
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend%O%s crtn%O%s"
......
gcc/config/mips/linux.h
......@@ -127,7 +127,7 @@ void FN () \
builtin_define_std ("linux"); \
builtin_assert ("system=linux"); \
/* The GNU C++ standard library requires this. */ \
if (c_language = clk_cplusplus) \
if (c_language == clk_cplusplus) \
builtin_define ("_GNU_SOURCE"); \
\
if (mips_abi == ABI_N32) \
......
gcc/config/mips/mips-protos.h
......@@ -39,7 +39,7 @@ extern int mips_can_use_return_insn PARAMS ((void));
extern void mips_declare_object PARAMS ((FILE *, const char *,
const char *,
const char *, int));
extern void mips_expand_epilogue PARAMS ((void));
extern void mips_expand_epilogue PARAMS ((int));
extern void mips_expand_prologue PARAMS ((void));
extern void mips_output_filename PARAMS ((FILE *, const char *));
extern void mips_output_lineno PARAMS ((FILE *, int));
......@@ -81,6 +81,12 @@ extern void mips_va_start PARAMS ((tree, rtx));
extern struct rtx_def *mips_va_arg PARAMS ((tree, tree));
extern void expand_block_move PARAMS ((rtx *));
extern bool mips_expand_unaligned_load PARAMS ((rtx, rtx,
unsigned int,
int));
extern bool mips_expand_unaligned_store PARAMS ((rtx, rtx,
unsigned int,
int));
extern void final_prescan_insn PARAMS ((rtx, rtx *, int));
extern void init_cumulative_args PARAMS ((CUMULATIVE_ARGS *,
tree, rtx));
......@@ -91,13 +97,11 @@ extern void mips_set_return_address PARAMS ((rtx, rtx));
extern void machine_dependent_reorg PARAMS ((rtx));
extern void mips_count_memory_refs PARAMS ((rtx, int));
extern HOST_WIDE_INT mips_debugger_offset PARAMS ((rtx, HOST_WIDE_INT));
extern int mips_check_split PARAMS ((rtx, enum machine_mode));
extern const char *mips_fill_delay_slot PARAMS ((const char *,
enum delay_type, rtx *,
rtx));
extern const char *mips_move_1word PARAMS ((rtx *, rtx, int));
extern const char *mips_move_2words PARAMS ((rtx *, rtx));
extern const char *mips_sign_extend PARAMS ((rtx, rtx, rtx));
extern const char *mips_emit_prefetch PARAMS ((rtx *));
extern const char *mips_restore_gp PARAMS ((rtx *, rtx));
extern const char *output_block_move PARAMS ((rtx, rtx *, int,
......@@ -106,12 +110,7 @@ extern void override_options PARAMS ((void));
extern void mips_conditional_register_usage PARAMS ((void));
extern void print_operand_address PARAMS ((FILE *, rtx));
extern void print_operand PARAMS ((FILE *, rtx, int));
extern int double_memory_operand PARAMS ((rtx,enum machine_mode));
extern struct rtx_def * embedded_pic_offset PARAMS ((rtx));
extern struct rtx_def * mips16_gp_offset PARAMS ((rtx));
extern int mips16_gp_offset_p PARAMS ((rtx));
extern int mips16_constant PARAMS ((rtx, enum machine_mode,
int, int));
extern int build_mips16_call_stub PARAMS ((rtx, rtx, rtx, int));
extern const char *mips_output_conditional_branch PARAMS ((rtx, rtx *,
int, int, int,
......@@ -120,7 +119,7 @@ extern int mips_adjust_insn_length PARAMS ((rtx, int));
extern enum reg_class mips_secondary_reload_class PARAMS ((enum reg_class,
enum machine_mode,
rtx, int));
extern bool mips_cannot_change_mode_class
extern bool mips_cannot_change_mode_class
PARAMS ((enum machine_mode, enum machine_mode,
enum reg_class));
extern int mips_class_max_nregs PARAMS ((enum reg_class,
......@@ -129,13 +128,21 @@ extern int mips_register_move_cost PARAMS ((enum machine_mode,
enum reg_class,
enum reg_class));
extern int pic_address_needs_scratch PARAMS ((rtx));
extern int se_arith_operand PARAMS ((rtx, enum machine_mode));
extern int coprocessor_operand PARAMS ((rtx, enum machine_mode));
extern int coprocessor2_operand PARAMS ((rtx, enum machine_mode));
extern int symbolic_operand PARAMS ((rtx, enum machine_mode));
extern int mips_legitimate_address_p PARAMS ((enum machine_mode,
extern int mips_address_insns PARAMS ((rtx, enum machine_mode));
extern int mips_fetch_insns PARAMS ((rtx));
extern int mips_const_insns PARAMS ((rtx));
extern bool mips_global_pic_constant_p PARAMS ((rtx));
extern bool mips_legitimate_address_p PARAMS ((enum machine_mode,
rtx, int));
extern bool mips_legitimize_address PARAMS ((rtx *,
enum machine_mode));
extern bool mips_legitimize_move PARAMS ((enum machine_mode,
rtx, rtx));
extern rtx mips_simplify_dwarf_addr PARAMS ((rtx));
extern void mips_expand_call PARAMS ((rtx, rtx, rtx, rtx, int));
extern int mips_reg_mode_ok_for_base_p PARAMS ((rtx,
enum machine_mode,
int));
......@@ -165,5 +172,6 @@ extern rtx gen_int_relational PARAMS ((enum rtx_code, rtx, rtx,
rtx,int *));
extern void gen_conditional_branch PARAMS ((rtx *, enum rtx_code));
#endif
extern rtx mips_return_addr PARAMS ((int, rtx));
#endif /* ! GCC_MIPS_PROTOS_H */
gcc/config/mips/mips.c
This source diff could not be displayed because it is too large. You can view the blob instead.
gcc/config/mips/mips.md
This source diff could not be displayed because it is too large. You can view the blob instead.
gcc/config/mips/sr71k.md
......@@ -206,7 +206,7 @@
(define_insn_reservation "ir_sr70_arith"
1
(and (eq_attr "cpu" "sr71000")
(eq_attr "type" "arith,darith"))
(eq_attr "type" "arith,darith,const"))
"ri_insns")
;; emulate repeat (dispatch stall) by spending extra cycle(s) in
......
gcc/config/mips/t-elf
......@@ -31,9 +31,9 @@ TARGET_LIBGCC2_CFLAGS = -G 0
# Build the libraries for both hard and soft floating point
MULTILIB_OPTIONS = msoft-float EL/EB
MULTILIB_DIRNAMES = soft-float el eb
MULTILIB_MATCHES = EL=mel EB=meb
#MULTILIB_OPTIONS = msoft-float EL/EB
#MULTILIB_DIRNAMES = soft-float el eb
#MULTILIB_MATCHES = EL=mel EB=meb
#MULTILIB_MATCHES = msingle-float=m4650
EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
......
gcc/configure
This source diff could not be displayed because it is too large. You can view the blob instead.
gcc/configure.in
......@@ -2600,6 +2600,23 @@ case "$target" in
[Define if your MIPS libgloss linker scripts consistently include STARTUP directives.])
fi
AC_MSG_RESULT($gcc_cv_mips_libgloss_startup)
AC_MSG_CHECKING(whether the assembler has explicit relocation support)
if test x$gcc_cv_mips_explicit_relocs = x; then
gcc_cv_mips_explicit_relocs=no
if test x$gcc_cv_as != x; then
echo ' lw $4,%gp_rel(foo)($4)' > conftest.s
if $gcc_cv_as conftest.s -o conftest.o > /dev/null 2>&1; then
gcc_cv_mips_explicit_relocs=yes
fi
rm -f conftest.s conftest.o
fi
fi
if test $gcc_cv_mips_explicit_relocs = yes; then
test x$target_cpu_default != x || target_cpu_default=0
target_cpu_default="(${target_cpu_default}|MASK_EXPLICIT_RELOCS)"
fi
AC_MSG_RESULT($gcc_cv_mips_explicit_relocs)
;;
esac
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment