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Commit cafd2e45 by Matthew Wahab Committed by Matthew Wahab
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arm-fpus.def: Replace booleans with feature flags. 

	* config/arm/arm-fpus.def: Replace booleans with feature flags.
	Update comment.
	* config/arm/arm.c (ARM_FPU): Update macro.
	* config/arm/arm.h (TARGET_NEON_FP16): Update feature test.
	(TARGET_FP16): Likewise.
	(TARGET_CRYPTO): Likewise.
	(TARGET_NEON): Likewise.
	(struct arm_fpu_desc): Remove fields neon, fp16 and crypto.  Add
	field features.

From-SVN: r226821
parent 441fb2cd
Showing with 47 additions and 31 deletions
gcc/ChangeLog
2015-08-12 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-fpus.def: Replace booleans with feature flags.
Update comment.
* config/arm/arm.c (ARM_FPU): Update macro.
* config/arm/arm.h (TARGET_NEON_FP16): Update feature test.
(TARGET_FP16): Likewise.
(TARGET_CRYPTO): Likewise.
(TARGET_NEON): Likewise.
(struct arm_fpu_desc): Remove fields neon, fp16 and crypto. Add
field features.
2015-08-12 Tom de Vries <tom@codesourcery.com> 2015-08-12 Tom de Vries <tom@codesourcery.com>
PR other/67092 PR other/67092
......
gcc/config/arm/arm-fpus.def
...@@ -19,30 +19,30 @@ ...@@ -19,30 +19,30 @@
/* Before using #include to read this file, define a macro: /* Before using #include to read this file, define a macro:
ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO) ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES)
The arguments are the fields of struct arm_fpu_desc. The arguments are the fields of struct arm_fpu_desc.
genopt.sh assumes no whitespace up to the first "," in each entry. */ genopt.sh assumes no whitespace up to the first "," in each entry. */
ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false, false) ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, FPU_FL_NONE)
ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false) ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true, false) ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_FP16)
ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false, false) ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_NONE)
ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true, false) ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_FP16)
ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false, false) ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_NONE)
ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true, false) ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_FP16)
ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false, false) ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON)
ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true, true, false) ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true, false) ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_FP16)
ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true, false) ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, FPU_FL_FP16)
ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true, false) ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, FPU_FL_FP16)
ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, false, true, false) ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, FPU_FL_FP16)
ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, false, true, false) ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, FPU_FL_FP16)
ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true, false) ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, false, true, false) ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_FP16)
ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, false) ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("crypto-neon-fp-armv8", ARM_FPU("crypto-neon-fp-armv8",
ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, true) ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16 | FPU_FL_CRYPTO)
/* Compatibility aliases. */ /* Compatibility aliases. */
ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false) ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
gcc/config/arm/arm.c
...@@ -2230,8 +2230,8 @@ char arm_arch_name[] = "__ARM_ARCH_0UNK__"; ...@@ -2230,8 +2230,8 @@ char arm_arch_name[] = "__ARM_ARCH_0UNK__";
static const struct arm_fpu_desc all_fpus[] = static const struct arm_fpu_desc all_fpus[] =
{ {
#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO) \ #define ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES) \
{ NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO }, { NAME, MODEL, REV, VFP_REGS, FEATURES },
#include "arm-fpus.def" #include "arm-fpus.def"
#undef ARM_FPU #undef ARM_FPU
}; };
......
gcc/config/arm/arm.h
...@@ -193,11 +193,13 @@ extern void (*arm_lang_output_object_attributes_hook)(void); ...@@ -193,11 +193,13 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
#define TARGET_VFP_DOUBLE (TARGET_VFP && arm_fpu_desc->regs != VFP_REG_SINGLE) #define TARGET_VFP_DOUBLE (TARGET_VFP && arm_fpu_desc->regs != VFP_REG_SINGLE)
/* FPU supports half-precision floating-point with NEON element load/store. */ /* FPU supports half-precision floating-point with NEON element load/store. */
#define TARGET_NEON_FP16 \ #define TARGET_NEON_FP16 \
(TARGET_VFP && arm_fpu_desc->neon && arm_fpu_desc->fp16) (TARGET_VFP \
&& ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON | FPU_FL_FP16))
/* FPU supports VFP half-precision floating-point. */ /* FPU supports VFP half-precision floating-point. */
#define TARGET_FP16 (TARGET_VFP && arm_fpu_desc->fp16) #define TARGET_FP16 \
(TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_FP16))
/* FPU supports fused-multiply-add operations. */ /* FPU supports fused-multiply-add operations. */
#define TARGET_FMA (TARGET_VFP && arm_fpu_desc->rev >= 4) #define TARGET_FMA (TARGET_VFP && arm_fpu_desc->rev >= 4)
...@@ -206,14 +208,18 @@ extern void (*arm_lang_output_object_attributes_hook)(void); ...@@ -206,14 +208,18 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
#define TARGET_FPU_ARMV8 (TARGET_VFP && arm_fpu_desc->rev >= 8) #define TARGET_FPU_ARMV8 (TARGET_VFP && arm_fpu_desc->rev >= 8)
/* FPU supports Crypto extensions. */ /* FPU supports Crypto extensions. */
#define TARGET_CRYPTO (TARGET_VFP && arm_fpu_desc->crypto) #define TARGET_CRYPTO \
(TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_CRYPTO))
/* FPU supports Neon instructions. The setting of this macro gets /* FPU supports Neon instructions. The setting of this macro gets
revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT
and TARGET_HARD_FLOAT to ensure that NEON instructions are and TARGET_HARD_FLOAT to ensure that NEON instructions are
available. */ available. */
#define TARGET_NEON (TARGET_32BIT && TARGET_HARD_FLOAT \ #define TARGET_NEON \
&& TARGET_VFP && arm_fpu_desc->neon) (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP \
&& ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON))
/* Q-bit is present. */ /* Q-bit is present. */
#define TARGET_ARM_QBIT_P(flags) \ #define TARGET_ARM_QBIT_P(flags) \
...@@ -353,9 +359,7 @@ extern const struct arm_fpu_desc ...@@ -353,9 +359,7 @@ extern const struct arm_fpu_desc
enum arm_fp_model model; enum arm_fp_model model;
int rev; int rev;
enum vfp_reg_type regs; enum vfp_reg_type regs;
int neon; arm_fpu_feature_set features;
int fp16;
int crypto;
} *arm_fpu_desc; } *arm_fpu_desc;
/* Which floating point hardware to schedule for. */ /* Which floating point hardware to schedule for. */
......
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