Skip to content

R
riscv-gcc-1
Commit cad055a4 by Nick Clifton Committed by Nick Clifton
Options

msp430-protos.h: Add prototypes for new functions. 

	* config/msp430/msp430-protos.h: Add prototypes for new functions.
	* config/msp430/msp430.c (msp430_preserve_reg_p): Add support for
	interrupt handlers.
	(is_attr_func): New function.
	(msp430_is_interrupt_func): New function.
	(is_naked_func): New function.
	(is_reentrant_func): New function.
	(is_critical_func): New function.
	(msp430_start_function): Add annotations for function attributes.
	(msp430_attr): New function.
	(msp430_attribute_table): New.
	(msp430_function_section): New function.
	(TARGET_ASM_FUNCTION_SECTION): Define.
	(msp430_builtin): New enum.
	(msp430_init_builtins): New function.
	(msp430_builtin_devl): New function.
	(msp430_expand_builtin): New function.
	(TARGET_INIT_BUILTINS): Define.
	(TARGET_EXPAND_BUILTINS): Define.
	(TARGET_BUILTIN_DECL): Define.
	(msp430_expand_prologue): Add support for naked, interrupt,
	critical and reentrant functions.
	(msp430_expand_epilogue): Likewise.
	(msp430_print_operand): Handle 'O' character.
	* config/msp430/msp430.h (TARGET_CPU_CPP_BUILTINS): Define
	NO_TRAMPOLINES.
	* config/msp430/msp430.md (unspec): Add UNS_DINT, UNS_EINT,
	UNS_PUSH_INTR, UNS_POP_INTR, UNS_BIC_SR, UNS_BIS_SR.
	(pushm): Use a 'n' rather than an 'i' constraint.
	(msp_return): Add generation of the interrupt return instruction.
	(disable_interrupts): New pattern.
	(enable_interrupts): New pattern.
	(push_intr_state): New pattern.
	(pop_intr_state): New pattern.
	(bic_SR): New pattern.
	(bis_SR): New pattern.
	* doc/extend.texi: Document MSP430 function attributes and builtin
	functions.

From-SVN: r202645
parent deb6c11a
Showing with 151 additions and 13 deletions
gcc/ChangeLog
2013-09-17 Nick Clifton <nickc@redhat.com>
* config/msp430/msp430-protos.h: Add prototypes for new functions.
* config/msp430/msp430.c (msp430_preserve_reg_p): Add support for
interrupt handlers.
(is_attr_func): New function.
(msp430_is_interrupt_func): New function.
(is_naked_func): New function.
(is_reentrant_func): New function.
(is_critical_func): New function.
(msp430_start_function): Add annotations for function attributes.
(msp430_attr): New function.
(msp430_attribute_table): New.
(msp430_function_section): New function.
(TARGET_ASM_FUNCTION_SECTION): Define.
(msp430_builtin): New enum.
(msp430_init_builtins): New function.
(msp430_builtin_devl): New function.
(msp430_expand_builtin): New function.
(TARGET_INIT_BUILTINS): Define.
(TARGET_EXPAND_BUILTINS): Define.
(TARGET_BUILTIN_DECL): Define.
(msp430_expand_prologue): Add support for naked, interrupt,
critical and reentrant functions.
(msp430_expand_epilogue): Likewise.
(msp430_print_operand): Handle 'O' character.
* config/msp430/msp430.h (TARGET_CPU_CPP_BUILTINS): Define
NO_TRAMPOLINES.
* config/msp430/msp430.md (unspec): Add UNS_DINT, UNS_EINT,
UNS_PUSH_INTR, UNS_POP_INTR, UNS_BIC_SR, UNS_BIS_SR.
(pushm): Use a 'n' rather than an 'i' constraint.
(msp_return): Add generation of the interrupt return instruction.
(disable_interrupts): New pattern.
(enable_interrupts): New pattern.
(push_intr_state): New pattern.
(pop_intr_state): New pattern.
(bic_SR): New pattern.
(bis_SR): New pattern.
* doc/extend.texi: Document MSP430 function attributes and builtin
functions.
2013-09-17 Richard Biener <rguenther@suse.de>
PR tree-optimization/58432
......
gcc/config/msp430/constraints.md
......@@ -70,5 +70,3 @@
(match_test ("IN_RANGE (INTVAL (XEXP (XEXP (op, 0), 1)), -1 << 15, (1 << 15)-1)"))))
(match_code "reg" "0")
)))
gcc/config/msp430/msp430-protos.h
......@@ -21,6 +21,7 @@
#ifndef GCC_MSP430_PROTOS_H
#define GCC_MSP430_PROTOS_H
rtx msp430_eh_return_stackadj_rtx (void);
void msp430_expand_eh_return (rtx);
void msp430_expand_epilogue (int);
void msp430_expand_helper (rtx *operands, const char *, bool);
......@@ -32,13 +33,14 @@ int msp430_hard_regno_nregs (int, enum machine_mode);
rtx msp430_incoming_return_addr_rtx (void);
void msp430_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
int msp430_initial_elimination_offset (int, int);
bool msp430_is_interrupt_func (void);
const char * msp430x_logical_shift_right (rtx);
bool msp430_modes_tieable_p (enum machine_mode, enum machine_mode);
void msp430_output_labelref (FILE *, const char *);
void msp430_register_pragmas (void);
rtx msp430_return_addr_rtx (int);
void msp430_split_movsi (rtx *);
rtx msp430_subreg (enum machine_mode, rtx, enum machine_mode, int);
rtx msp430_eh_return_stackadj_rtx (void);
bool msp430_modes_tieable_p (enum machine_mode, enum machine_mode);
void msp430_start_function (FILE *, const char *, tree);
#endif /* GCC_MSP430_PROTOS_H */
gcc/config/msp430/msp430.h
/* GCC backend definitions for the TI MSP430 Processor
Copyright (C) 2012 Free Software Foundation, Inc.
Copyright (C) 2012-2013 Free Software Foundation, Inc.
Contributed by Red Hat.
This file is part of GCC.
......@@ -29,6 +29,7 @@ extern bool msp430x;
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
builtin_define ("NO_TRAMPOLINES"); \
builtin_define ("__MSP430__"); \
if (msp430x) \
{ \
......@@ -281,7 +282,8 @@ enum reg_class
typedef struct {
typedef struct
{
/* These two are the current argument status. */
char reg_used[4];
#define CA_FIRST_REG 12
......
gcc/config/msp430/msp430.md
......@@ -38,6 +38,13 @@
UNS_GROW_AND_SWAP
UNS_SWAP_AND_SHRINK
UNS_DINT
UNS_EINT
UNS_PUSH_INTR
UNS_POP_INTR
UNS_BIC_SR
UNS_BIS_SR
])
(include "predicates.md")
......@@ -78,7 +85,7 @@
(define_insn "pushm"
[(unspec_volatile [(match_operand 0 "register_operand" "r")
(match_operand 1 "immediate_operand" "i")] UNS_PUSHM)]
(match_operand 1 "immediate_operand" "n")] UNS_PUSHM)]
""
"PUSHM%B0\t%1, %0"
)
......@@ -950,7 +957,7 @@
(define_insn "msp_return"
[(return)]
""
{ return TARGET_LARGE ? "RETA" : "RET"; }
{ return msp430_is_interrupt_func () ? "RETI" : (TARGET_LARGE ? "RETA" : "RET"); }
)
;; This pattern is NOT, as expected, a return pattern. It's called
......@@ -1102,7 +1109,6 @@
CMP%X0.W\t%1, %2 { J%R0\t%l3"
)
(define_insn "*bitbranch<mode>4"
[(set (pc) (if_then_else
(ne (and:QHI (match_operand:QHI 0 "msp_nonimmediate_operand" "rYs,rm")
......@@ -1158,7 +1164,7 @@
)
;;------------------------------------------------------------
;; zero-extend versions of the above
;; zero-extract versions of the above
(define_insn "*bitbranch<mode>4_z"
[(set (pc) (if_then_else
......@@ -1227,3 +1233,42 @@
"NOP"
)
(define_insn "disable_interrupts"
[(unspec_volatile [(const_int 0)] UNS_DINT)]
""
"DINT"
)
(define_insn "enable_interrupts"
[(unspec_volatile [(const_int 0)] UNS_EINT)]
""
"EINT"
)
(define_insn "push_intr_state"
[(unspec_volatile [(const_int 0)] UNS_PUSH_INTR)]
""
"PUSH\tSR"
)
(define_insn "pop_intr_state"
[(unspec_volatile [(const_int 0)] UNS_POP_INTR)]
""
"POP\tSR"
)
;; Clear bits in the copy of the status register that is currently
;; saved on the stack at the top of the interrupt handler.
(define_insn "bic_SR"
[(unspec_volatile [(match_operand 0 "nonmemory_operand" "ir")] UNS_BIC_SR)]
""
"BIC.W\t%0, %O0(SP)"
)
;; Set bits in the copy of the status register that is currently
;; saved on the stack at the top of the interrupt handler.
(define_insn "bis_SR"
[(unspec_volatile [(match_operand 0 "nonmemory_operand" "ir")] UNS_BIS_SR)]
""
"BIS.W\t%0, %O0(SP)"
)
gcc/doc/extend.texi
......@@ -30,7 +30,7 @@ extensions, accepted by GCC in C90 mode and in C++.
* Constructing Calls:: Dispatching a call to another function.
* Typeof:: @code{typeof}: referring to the type of an expression.
* Conditionals:: Omitting the middle operand of a @samp{?:} expression.
* __int128:: 128-bit integers---@code{__int128}.
* __int128:: 128-bit integers---@code{__int128}.
* Long Long:: Double-word integers---@code{long long int}.
* Complex:: Data types for complex numbers.
* Floating Types:: Additional Floating Types.
......@@ -2813,7 +2813,7 @@ least version 2.20.1), and GNU C library (at least version 2.11.1).
@item interrupt
@cindex interrupt handler functions
Use this attribute on the ARM, AVR, CR16, Epiphany, M32C, M32R/D, m68k, MeP, MIPS,
RL78, RX and Xstormy16 ports to indicate that the specified function is an
MSP430, RL78, RX and Xstormy16 ports to indicate that the specified function is an
interrupt handler. The compiler generates function entry and exit
sequences suitable for use in an interrupt handler when this attribute
is present. With Epiphany targets it may also generate a special section with
......@@ -2844,6 +2844,35 @@ Permissible values for this parameter are: @code{IRQ}, @code{FIQ},
On ARMv7-M the interrupt type is ignored, and the attribute means the function
may be called with a word-aligned stack pointer.
Note, for the MSP430 you can provide an argument to the interrupt
attribute which specifies a name or number. If the argument is a
number it indicates the slot in the interrupt vector table (0 - 31) to
which this handler should be assigned. If the argument is a name it
is treated as a symbolic name for the vector slot. These names should
match up with appropriate entries in the linker script. By default
the names @code{watchdog} for vector 26, @code{nmi} for vector 30 and
@code{reset} for vector 31 are recognised.
You can also use the following function attributes to modify how
normal functions interact with interrupt functions:
@table @code
@item critical
@cindex @code{critical} attribute
Critical functions disable interrupts upon entry and restore the
previous interrupt state upon exit. Critical functions cannot also
have the @code{naked} or @code{reentrant} attributes. They can have
the @code{interrupt} attribute.
@item reentrant
@cindex @code{reentrant} attribute
Reentrant functions disable interrupts upon entry and enable them
upon exit. Reentrant functions cannot also have the @code{naked}
or @code{critical} attributes. They can have the @code{interrupt}
attribute.
@end table
On Epiphany targets one or more optional parameters can be added like this:
@smallexample
......@@ -3143,7 +3172,7 @@ and newer.
@item naked
@cindex function without a prologue/epilogue code
Use this attribute on the ARM, AVR, MCORE, RL78, RX and SPU ports to indicate that
Use this attribute on the ARM, AVR, MCORE, MSP430, RL78, RX and SPU ports to indicate that
the specified function does not need prologue/epilogue sequences generated by
the compiler. It is up to the programmer to provide these sequences. The
only statements that can be safely included in naked functions are
......@@ -8844,6 +8873,7 @@ instructions, but allow the compiler to schedule those calls.
* MIPS Paired-Single Support::
* MIPS Loongson Built-in Functions::
* Other MIPS Built-in Functions::
* MSP430 Built-in Functions::
* picoChip Built-in Functions::
* PowerPC Built-in Functions::
* PowerPC AltiVec/VSX Built-in Functions::
......@@ -11853,6 +11883,26 @@ GCC defines the preprocessor macro @code{___GCC_HAVE_BUILTIN_MIPS_CACHE}
when this function is available.
@end table
@node MSP430 Built-in Functions
@subsection MSP430 Built-in Functions
GCC provides a couple of special builtin functions to aid in the
writing of interrupt handlers in C.
@table @code
@item __bic_SR_register_on_exit (int @var{mask})
This clears the indicated bits in the saved copy of the status register
currently residing on the stack. This only works inside interrupt
handlers and the changes to the status register will only take affect
once the handler returns.
@item __bis_SR_register_on_exit (int @var{mask})
This sets the indicated bits in the saved copy of the status register
currently residing on the stack. This only works inside interrupt
handlers and the changes to the status register will only take affect
once the handler returns.
@end table
@node picoChip Built-in Functions
@subsection picoChip Built-in Functions
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment