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riscv-gcc-1
Commit cabfd258 by Geoffrey Keating Committed by Geoffrey Keating
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rs6000.c (expand_block_move): Unify the TARGET_STRING and ! TARGET_STRING cases. 

	* config/rs6000/rs6000.c (expand_block_move): Unify the TARGET_STRING
	and ! TARGET_STRING cases.

From-SVN: r66896
parent 7e53359d
Showing with 120 additions and 167 deletions
gcc/ChangeLog
...@@ -8,6 +8,9 @@ ...@@ -8,6 +8,9 @@
2003-05-16 Geoffrey Keating <geoffk@apple.com> 2003-05-16 Geoffrey Keating <geoffk@apple.com>
* config/rs6000/rs6000.c (expand_block_move): Unify the TARGET_STRING
and ! TARGET_STRING cases.
* doc/cppopts.texi (-undef): Fix texinfo warning. * doc/cppopts.texi (-undef): Fix texinfo warning.
* doc/cppopts.texi (-H): Document that -H works for PCH files too. * doc/cppopts.texi (-H): Document that -H works for PCH files too.
......
gcc/config/rs6000/rs6000.c
...@@ -6873,6 +6873,8 @@ expand_block_move (operands) ...@@ -6873,6 +6873,8 @@ expand_block_move (operands)
int bytes; int bytes;
int offset; int offset;
int move_bytes; int move_bytes;
rtx stores[MAX_MOVE_REG];
int num_reg = 0;
/* If this is not a fixed size move, just call memcpy */ /* If this is not a fixed size move, just call memcpy */
if (! constp) if (! constp)
...@@ -6893,182 +6895,130 @@ expand_block_move (operands) ...@@ -6893,182 +6895,130 @@ expand_block_move (operands)
if (bytes > (TARGET_POWERPC64 ? 64 : 32)) if (bytes > (TARGET_POWERPC64 ? 64 : 32))
return 0; return 0;
if (TARGET_STRING) /* string instructions are available */ for (offset = 0; bytes > 0; offset += move_bytes, bytes -= move_bytes)
{
for (offset = 0; bytes > 0; offset += move_bytes, bytes -= move_bytes)
{
union {
rtx (*movstrsi) PARAMS ((rtx, rtx, rtx, rtx));
rtx (*mov) PARAMS ((rtx, rtx));
} gen_func;
enum machine_mode mode = BLKmode;
rtx src, dest;
if (bytes > 24 /* move up to 32 bytes at a time */
&& ! fixed_regs[5]
&& ! fixed_regs[6]
&& ! fixed_regs[7]
&& ! fixed_regs[8]
&& ! fixed_regs[9]
&& ! fixed_regs[10]
&& ! fixed_regs[11]
&& ! fixed_regs[12])
{
move_bytes = (bytes > 32) ? 32 : bytes;
gen_func.movstrsi = gen_movstrsi_8reg;
}
else if (bytes > 16 /* move up to 24 bytes at a time */
&& ! fixed_regs[5]
&& ! fixed_regs[6]
&& ! fixed_regs[7]
&& ! fixed_regs[8]
&& ! fixed_regs[9]
&& ! fixed_regs[10])
{
move_bytes = (bytes > 24) ? 24 : bytes;
gen_func.movstrsi = gen_movstrsi_6reg;
}
else if (bytes > 8 /* move up to 16 bytes at a time */
&& ! fixed_regs[5]
&& ! fixed_regs[6]
&& ! fixed_regs[7]
&& ! fixed_regs[8])
{
move_bytes = (bytes > 16) ? 16 : bytes;
gen_func.movstrsi = gen_movstrsi_4reg;
}
else if (bytes >= 8 && TARGET_POWERPC64
/* 64-bit loads and stores require word-aligned
displacements. */
&& (align >= 8 || (! STRICT_ALIGNMENT && align >= 4)))
{
move_bytes = 8;
mode = DImode;
gen_func.mov = gen_movdi;
}
else if (bytes > 4 && !TARGET_POWERPC64)
{ /* move up to 8 bytes at a time */
move_bytes = (bytes > 8) ? 8 : bytes;
gen_func.movstrsi = gen_movstrsi_2reg;
}
else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT))
{ /* move 4 bytes */
move_bytes = 4;
mode = SImode;
gen_func.mov = gen_movsi;
}
else if (bytes == 2 && (align >= 2 || ! STRICT_ALIGNMENT))
{ /* move 2 bytes */
move_bytes = 2;
mode = HImode;
gen_func.mov = gen_movhi;
}
else if (bytes == 1) /* move 1 byte */
{
move_bytes = 1;
mode = QImode;
gen_func.mov = gen_movqi;
}
else
{ /* move up to 4 bytes at a time */
move_bytes = (bytes > 4) ? 4 : bytes;
gen_func.movstrsi = gen_movstrsi_1reg;
}
src = adjust_address (orig_src, mode, offset);
dest = adjust_address (orig_dest, mode, offset);
if (mode == BLKmode)
{
/* Move the address into scratch registers. The movstrsi
patterns require zero offset. */
if (!REG_P (XEXP (src, 0)))
{
rtx src_reg = copy_addr_to_reg (XEXP (src, 0));
src = replace_equiv_address (src, src_reg);
}
set_mem_size (src, GEN_INT (move_bytes));
if (!REG_P (XEXP (dest, 0)))
{
rtx dest_reg = copy_addr_to_reg (XEXP (dest, 0));
dest = replace_equiv_address (dest, dest_reg);
}
set_mem_size (dest, GEN_INT (move_bytes));
emit_insn ((*gen_func.movstrsi) (dest, src,
GEN_INT (move_bytes & 31),
align_rtx));
}
else
{
rtx tmp_reg = gen_reg_rtx (mode);
emit_insn ((*gen_func.mov) (tmp_reg, src));
emit_insn ((*gen_func.mov) (dest, tmp_reg));
}
}
}
else /* string instructions not available */
{ {
rtx stores[MAX_MOVE_REG]; union {
int num_reg = 0; rtx (*movstrsi) PARAMS ((rtx, rtx, rtx, rtx));
int i; rtx (*mov) PARAMS ((rtx, rtx));
} gen_func;
enum machine_mode mode = BLKmode;
rtx src, dest;
if (TARGET_STRING
&& bytes > 24 /* move up to 32 bytes at a time */
&& ! fixed_regs[5]
&& ! fixed_regs[6]
&& ! fixed_regs[7]
&& ! fixed_regs[8]
&& ! fixed_regs[9]
&& ! fixed_regs[10]
&& ! fixed_regs[11]
&& ! fixed_regs[12])
{
move_bytes = (bytes > 32) ? 32 : bytes;
gen_func.movstrsi = gen_movstrsi_8reg;
}
else if (TARGET_STRING
&& bytes > 16 /* move up to 24 bytes at a time */
&& ! fixed_regs[5]
&& ! fixed_regs[6]
&& ! fixed_regs[7]
&& ! fixed_regs[8]
&& ! fixed_regs[9]
&& ! fixed_regs[10])
{
move_bytes = (bytes > 24) ? 24 : bytes;
gen_func.movstrsi = gen_movstrsi_6reg;
}
else if (TARGET_STRING
&& bytes > 8 /* move up to 16 bytes at a time */
&& ! fixed_regs[5]
&& ! fixed_regs[6]
&& ! fixed_regs[7]
&& ! fixed_regs[8])
{
move_bytes = (bytes > 16) ? 16 : bytes;
gen_func.movstrsi = gen_movstrsi_4reg;
}
else if (bytes >= 8 && TARGET_POWERPC64
/* 64-bit loads and stores require word-aligned
displacements. */
&& (align >= 8 || (! STRICT_ALIGNMENT && align >= 4)))
{
move_bytes = 8;
mode = DImode;
gen_func.mov = gen_movdi;
}
else if (TARGET_STRING && bytes > 4 && !TARGET_POWERPC64)
{ /* move up to 8 bytes at a time */
move_bytes = (bytes > 8) ? 8 : bytes;
gen_func.movstrsi = gen_movstrsi_2reg;
}
else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT))
{ /* move 4 bytes */
move_bytes = 4;
mode = SImode;
gen_func.mov = gen_movsi;
}
else if (bytes == 2 && (align >= 2 || ! STRICT_ALIGNMENT))
{ /* move 2 bytes */
move_bytes = 2;
mode = HImode;
gen_func.mov = gen_movhi;
}
else if (TARGET_STRING && bytes > 1)
{ /* move up to 4 bytes at a time */
move_bytes = (bytes > 4) ? 4 : bytes;
gen_func.movstrsi = gen_movstrsi_1reg;
}
else /* move 1 byte at a time */
{
move_bytes = 1;
mode = QImode;
gen_func.mov = gen_movqi;
}
src = adjust_address (orig_src, mode, offset);
dest = adjust_address (orig_dest, mode, offset);
if (mode != BLKmode)
{
rtx tmp_reg = gen_reg_rtx (mode);
emit_insn ((*gen_func.mov) (tmp_reg, src));
stores[num_reg++] = (*gen_func.mov) (dest, tmp_reg);
}
for (offset = 0; bytes > 0; offset += move_bytes, bytes -= move_bytes) if (mode == BLKmode || num_reg >= MAX_MOVE_REG || bytes == move_bytes)
{ {
rtx (*gen_mov_func) PARAMS ((rtx, rtx)); int i;
enum machine_mode mode; for (i = 0; i < num_reg; i++)
rtx src, dest, tmp_reg; emit_insn (stores[i]);
num_reg = 0;
}
/* Generate the appropriate load and store, saving the stores if (mode == BLKmode)
for later. */ {
if (bytes >= 8 && TARGET_POWERPC64 /* Move the address into scratch registers. The movstrsi
/* 64-bit loads and stores require word-aligned patterns require zero offset. */
displacements. */ if (!REG_P (XEXP (src, 0)))
&& (align >= 8 || (! STRICT_ALIGNMENT && align >= 4)))
{
move_bytes = 8;
mode = DImode;
gen_mov_func = gen_movdi;
}
else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT))
{
move_bytes = 4;
mode = SImode;
gen_mov_func = gen_movsi;
}
else if (bytes >= 2 && (align >= 2 || ! STRICT_ALIGNMENT))
{
move_bytes = 2;
mode = HImode;
gen_mov_func = gen_movhi;
}
else
{ {
move_bytes = 1; rtx src_reg = copy_addr_to_reg (XEXP (src, 0));
mode = QImode; src = replace_equiv_address (src, src_reg);
gen_mov_func = gen_movqi;
} }
set_mem_size (src, GEN_INT (move_bytes));
src = adjust_address (orig_src, mode, offset);
dest = adjust_address (orig_dest, mode, offset); if (!REG_P (XEXP (dest, 0)))
tmp_reg = gen_reg_rtx (mode);
emit_insn ((*gen_mov_func) (tmp_reg, src));
stores[num_reg++] = (*gen_mov_func) (dest, tmp_reg);
if (num_reg >= MAX_MOVE_REG)
{ {
for (i = 0; i < num_reg; i++) rtx dest_reg = copy_addr_to_reg (XEXP (dest, 0));
emit_insn (stores[i]); dest = replace_equiv_address (dest, dest_reg);
num_reg = 0;
} }
set_mem_size (dest, GEN_INT (move_bytes));
emit_insn ((*gen_func.movstrsi) (dest, src,
GEN_INT (move_bytes & 31),
align_rtx));
} }
for (i = 0; i < num_reg; i++)
emit_insn (stores[i]);
} }
return 1; return 1;
......
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