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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
c9d4d2b4
Commit
c9d4d2b4
authored
Jun 24, 1994
by
Richard Kenner
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(ashrsi3, lshrsh3): Remove patterns using bfext[su].
From-SVN: r7556
parent
6d7d084a
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gcc/config/m68k/m68k.md
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gcc/config/m68k/m68k.md
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c9d4d2b4
...
...
@@ -3449,17 +3449,6 @@
return
\"
swap %0
\;
asr%.w %2,%0
\;
ext%.l %0
\"
;
}")
(define_insn ""
[
(set (match_operand:SI 0 "register_operand" "=d")
(ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "const_int_operand" "M")))]
"TARGET_68020 && operands
[
0
]
!= operands
[
1
]
&& INTVAL (operands
[
2
]
) > 8"
"
*
{
operands
[
2
]
= GEN_INT (32 - INTVAL (operands
[
2
]
));
return
\"
bfexts %1{%#0:%b2},%0
\"
;
}")
(define_insn "ashrsi3"
[
(set (match_operand:SI 0 "register_operand" "=d")
(ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
...
...
@@ -3526,17 +3515,6 @@
return
\"
clr%.w %0
\;
swap %0
\;
lsr%.w %2,%0
\"
;
}")
(define_insn ""
[
(set (match_operand:SI 0 "register_operand" "=d")
(lshiftrt:SI (match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "const_int_operand" "M")))]
"TARGET_68020 && operands
[
0
]
!= operands
[
1
]
&& INTVAL (operands
[
2
]
) > 8"
"
*
{
operands
[
2
]
= GEN_INT (32 - INTVAL (operands
[
2
]
));
return
\"
bfextu %1{%#0:%b2},%0
\"
;
}")
(define_insn "lshrsi3"
[
(set (match_operand:SI 0 "register_operand" "=d")
(lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
...
...
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