arm-protos.h (arm_set_return_address, [...]): Add prototypes.

	* config/arm/arm-protos.h (arm_set_return_address,
	thumb_set_return_address): Add prototypes.
	* config/arm/arm.h (ARM_FT_EXCEPTION_HANDLER): Remove.
	* config/arm/arm.c (arm_compute_func_type,
	use_return_insn, arm_compute_save_reg0_reg12_mask,
	arm_compute_save_reg_mask, arm_output_function_prologue,
	arm_output_epilogue): Replace ARM_FT_EXCEPTION_HANDLER with
	current_function_calls_eh_return.
	(thumb_exit, thumb_pushpop, thumb_unexpanded_epilogue): Replace
	old eh code.
	(arm_set_return_address, thumb_set_return_address): New functions.
	* config/arm/arm.h (MUST_USE_SJLJ_EXCEPTIONS, DWARF2_UNWIND_INFO,
	ARM_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX): Define.
	* config/arm/arm.md (VUNSPEC_EH_RETURN): Add.
	(epilogue): Use the stackadj register.
	(eh_return, arm_eh_return, thumb_eh_return): New pattern.

From-SVN: r85757

gcc/ChangeLog

+2004-08-10  Paul Brook  <paul@codesourcery.com>
+
+	* config/arm/arm-protos.h (arm_set_return_address,
+	thumb_set_return_address): Add prototypes.
+	* config/arm/arm.h (ARM_FT_EXCEPTION_HANDLER): Remove.
+	* config/arm/arm.c (arm_compute_func_type,
+	use_return_insn, arm_compute_save_reg0_reg12_mask,
+	arm_compute_save_reg_mask, arm_output_function_prologue,
+	arm_output_epilogue): Replace ARM_FT_EXCEPTION_HANDLER with
+	current_function_calls_eh_return.
+	(thumb_exit, thumb_pushpop, thumb_unexpanded_epilogue): Replace
+	old eh code.
+	(arm_set_return_address, thumb_set_return_address): New functions.
+	* config/arm/arm.h (MUST_USE_SJLJ_EXCEPTIONS, DWARF2_UNWIND_INFO,
+	ARM_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX): Define.
+	* config/arm/arm.md (VUNSPEC_EH_RETURN): Add.
+	(epilogue): Use the stackadj register.
+	(eh_return, arm_eh_return, thumb_eh_return): New pattern.
+
 2004-08-10  Jakub Jelinek  <jakub@redhat.com>
 
 	PR target/3144

gcc/config/arm/arm-protos.h

@@ -151,6 +151,7 @@ extern int arm_is_longcall_p (rtx, int, int);
 extern int    arm_emit_vector_const (FILE *, rtx);
 extern const char * arm_output_load_gr (rtx *);
 extern const char *vfp_output_fstmx (rtx *);
+extern void arm_set_return_address (rtx, rtx);
 
 #if defined TREE_CODE
 extern rtx arm_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
@@ -194,6 +195,7 @@ extern int thumb_go_if_legitimate_address (enum machine_mode, rtx);
 extern rtx arm_return_addr (int, rtx);
 extern void thumb_reload_out_hi (rtx *);
 extern void thumb_reload_in_hi (rtx *);
+extern void thumb_set_return_address (rtx, rtx);
 #endif
 
 /* Defined in pe.c.  */

gcc/config/arm/arm.h

@@ -963,8 +963,17 @@ extern const char * structure_size_string;
 #define FIRST_HI_REGNUM		8
 #define LAST_HI_REGNUM		11
 
+/* We use sjlj exceptions for backwards compatibility.  */
+#define MUST_USE_SJLJ_EXCEPTIONS 1
+/* We can generate DWARF2 Unwind info, even though we don't use it.  */
+#define DWARF2_UNWIND_INFO 1
+			     
+/* Use r0 and r1 to pass exception handling information.  */
+#define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? N : INVALID_REGNUM)
+
 /* The register that holds the return address in exception handlers.  */
-#define EXCEPTION_LR_REGNUM	2
+#define ARM_EH_STACKADJ_REGNUM	2
+#define EH_RETURN_STACKADJ_RTX	gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM)
 
 /* The native (Norcroft) Pascal compiler for the ARM passes the static chain
    as an invisible last argument (possible since varargs don't exist in
@@ -1592,7 +1601,6 @@ enum reg_class
 #define ARM_FT_UNKNOWN		 0 /* Type has not yet been determined.  */
 #define ARM_FT_NORMAL		 1 /* Your normal, straightforward function.  */
 #define ARM_FT_INTERWORKED	 2 /* A function that supports interworking.  */
-#define ARM_FT_EXCEPTION_HANDLER 3 /* A C++ exception handler.  */
 #define ARM_FT_ISR		 4 /* An interrupt service routine.  */
 #define ARM_FT_FIQ		 5 /* A fast interrupt service routine.  */
 #define ARM_FT_EXCEPTION	 6 /* An ARM exception handler (subcase of ISR).  */

gcc/config/arm/arm.md

@@ -117,6 +117,8 @@
    (VUNSPEC_WCMP_EQ  11) ; Used by the iWMMXt WCMPEQ instructions
    (VUNSPEC_WCMP_GTU 12) ; Used by the iWMMXt WCMPGTU instructions
    (VUNSPEC_WCMP_GT  13) ; Used by the iwMMXT WCMPGT instructions
+   (VUNSPEC_EH_RETURN 20); Use to overrite the return address for exception
+			 ; handling.
   ]
 )
 
@@ -9703,9 +9705,11 @@
 )
 
 (define_expand "epilogue"
-  [(unspec_volatile [(return)] VUNSPEC_EPILOGUE)]
+  [(clobber (const_int 0))]
   "TARGET_EITHER"
   "
+  if (current_function_calls_eh_return)
+    emit_insn (gen_prologue_use (gen_rtx_REG (Pmode, 2)));
   if (TARGET_THUMB)
     thumb_expand_epilogue ();
   else if (USE_RETURN_INSN (FALSE))
@@ -10224,6 +10228,53 @@
   "%@ %0 needed for prologue"
 )
 
+
+;; Patterns for exception handling
+
+(define_expand "eh_return"
+  [(use (match_operand 0 "general_operand" ""))]
+  "TARGET_EITHER"
+  "
+  {
+    if (TARGET_ARM)
+      emit_insn (gen_arm_eh_return (operands[0]));
+    else
+      emit_insn (gen_thumb_eh_return (operands[0]));
+    DONE;
+  }"
+)
+				   
+;; We can't expand this before we know where the link register is stored.
+(define_insn_and_split "arm_eh_return"
+  [(unspec_volatile [(match_operand:SI 0 "s_register_operand" "r")]
+		    VUNSPEC_EH_RETURN)
+   (clobber (match_scratch:SI 1 "=&r"))]
+  "TARGET_ARM"
+  "#"
+  "&& reload_completed"
+  [(const_int 0)]
+  "
+  {
+    arm_set_return_address (operands[0], operands[1]);
+    DONE;
+  }"
+)
+
+(define_insn_and_split "thumb_eh_return"
+  [(unspec_volatile [(match_operand:SI 0 "s_register_operand" "l")]
+		    VUNSPEC_EH_RETURN)
+   (clobber (match_scratch:SI 1 "=&l"))]
+  "TARGET_THUMB"
+  "#"
+  "&& reload_completed"
+  [(const_int 0)]
+  "
+  {
+    thumb_set_return_address (operands[0], operands[1]);
+    DONE;
+  }"
+)
+
 ;; Load the FPA co-processor patterns
 (include "fpa.md")
 ;; Load the Maverick co-processor patterns