Fix ldrd offsets

Fix the ldrd offsets of Thumb-2 - for TARGET_LDRD the range is +-1020,
without -252..4096.  This reduces the number of addressing instructions
when using DI mode operations (such as in PR77308).

    gcc/
	* config/arm/arm.c (arm_legitimate_index_p): Add comment.
	(thumb2_legitimate_index_p): Use correct range for DI/DF mode.

From-SVN: r251681

gcc/ChangeLog

+2017-09-04  Wilco Dijkstra  <wdijkstr@arm.com>
+
+	* config/arm/arm.c (arm_legitimate_index_p): Add comment.
+	(thumb2_legitimate_index_p): Use correct range for DI/DF mode.
+
 2017-09-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 
 	PR target/77308

gcc/config/arm/arm.c

@@ -7932,6 +7932,8 @@ arm_legitimate_index_p (machine_mode mode, rtx index, RTX_CODE outer,
 	{
 	  HOST_WIDE_INT val = INTVAL (index);
 
+	  /* Assume we emit ldrd or 2x ldr if !TARGET_LDRD.
+	     If vldr is selected it uses arm_coproc_mem_operand.  */
 	  if (TARGET_LDRD)
 	    return val > -256 && val < 256;
 	  else
@@ -8059,11 +8061,13 @@ thumb2_legitimate_index_p (machine_mode mode, rtx index, int strict_p)
       if (code == CONST_INT)
 	{
 	  HOST_WIDE_INT val = INTVAL (index);
-	  /* ??? Can we assume ldrd for thumb2?  */
-	  /* Thumb-2 ldrd only has reg+const addressing modes.  */
-	  /* ldrd supports offsets of +-1020.
-	     However the ldr fallback does not.  */
-	  return val > -256 && val < 256 && (val & 3) == 0;
+	  /* Thumb-2 ldrd only has reg+const addressing modes.
+	     Assume we emit ldrd or 2x ldr if !TARGET_LDRD.
+	     If vldr is selected it uses arm_coproc_mem_operand.  */
+	  if (TARGET_LDRD)
+	    return IN_RANGE (val, -1020, 1020) && (val & 3) == 0;
+	  else
+	    return IN_RANGE (val, -255, 4095 - 4);
 	}
       else
 	return 0;