Commit c914ac45 by Andreas Krebbel Committed by Andreas Krebbel

S/390: Clobber VRs in __builtin_tbegin.

gcc/ChangeLog:
	    * config/s390/s390.c (s390_expand_tbegin): Expand either
	    tbegin_1_z13 or tbegin_1 depending on VX flag.
	    * config/s390/s390.md ("tbegin_1_z13"): New expander.

gcc/testsuite/ChangeLog:
	    * gcc.target/s390/htm-builtins-z13-1.c: New test.

From-SVN: r226672
parent 17f262c5
2015-08-06 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_tbegin): Expand either
tbegin_1_z13 or tbegin_1 depending on VX flag.
* config/s390/s390.md ("tbegin_1_z13"): New expander.
2015-08-06 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.opt: Clarify description for -mzvector
* doc/invoke.texi: Add documentation for -mhtm, -mvx, and
-mzvector.
......
......@@ -11623,7 +11623,14 @@ s390_expand_tbegin (rtx dest, rtx tdb, rtx retry, bool clobber_fprs_p)
}
if (clobber_fprs_p)
emit_insn (gen_tbegin_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK), tdb));
{
if (TARGET_VX)
emit_insn (gen_tbegin_1_z13 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK),
tdb));
else
emit_insn (gen_tbegin_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK),
tdb));
}
else
emit_insn (gen_tbegin_nofloat_1 (gen_rtx_CONST_INT (VOIDmode, TBEGIN_MASK),
tdb));
......
......@@ -10626,6 +10626,35 @@
DONE;
})
; Clobber VRs since they don't get restored
(define_insn "tbegin_1_z13"
[(set (reg:CCRAW CC_REGNUM)
(unspec_volatile:CCRAW [(match_operand 0 "const_int_operand" "D")]
UNSPECV_TBEGIN))
(set (match_operand:BLK 1 "memory_operand" "=Q")
(unspec_volatile:BLK [(match_dup 0)] UNSPECV_TBEGIN_TDB))
(clobber (reg:TI 16)) (clobber (reg:TI 38))
(clobber (reg:TI 17)) (clobber (reg:TI 39))
(clobber (reg:TI 18)) (clobber (reg:TI 40))
(clobber (reg:TI 19)) (clobber (reg:TI 41))
(clobber (reg:TI 20)) (clobber (reg:TI 42))
(clobber (reg:TI 21)) (clobber (reg:TI 43))
(clobber (reg:TI 22)) (clobber (reg:TI 44))
(clobber (reg:TI 23)) (clobber (reg:TI 45))
(clobber (reg:TI 24)) (clobber (reg:TI 46))
(clobber (reg:TI 25)) (clobber (reg:TI 47))
(clobber (reg:TI 26)) (clobber (reg:TI 48))
(clobber (reg:TI 27)) (clobber (reg:TI 49))
(clobber (reg:TI 28)) (clobber (reg:TI 50))
(clobber (reg:TI 29)) (clobber (reg:TI 51))
(clobber (reg:TI 30)) (clobber (reg:TI 52))
(clobber (reg:TI 31)) (clobber (reg:TI 53))]
; CONST_OK_FOR_CONSTRAINT_P does not work with D constraint since D is
; not supposed to be used for immediates (see genpreds.c).
"TARGET_VX && INTVAL (operands[0]) >= 0 && INTVAL (operands[0]) <= 0xffff"
"tbegin\t%1,%x0"
[(set_attr "op_type" "SIL")])
(define_insn "tbegin_1"
[(set (reg:CCRAW CC_REGNUM)
(unspec_volatile:CCRAW [(match_operand 0 "const_int_operand" "D")]
......
2015-08-06 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/htm-builtins-z13-1.c: New test.
2015-08-06 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
PR fortran/64022
......
/* Verify if VRs are saved and restored. */
/* { dg-do run } */
/* { dg-require-effective-target vector } */
/* { dg-options "-O3 -march=z13 -mzarch" } */
typedef int __attribute__((vector_size(16))) v4si;
v4si __attribute__((noinline))
foo (v4si a)
{
a += (v4si){ 1, 1, 1, 1 };
if (__builtin_tbegin (0) == 0)
{
a += (v4si){ 1, 1, 1, 1 };
__builtin_tabort (256);
__builtin_tend ();
}
else
a -= (v4si){ 1, 1, 1, 1 };
return a;
}
int
main ()
{
v4si a = (v4si){ 0, 0, 0, 0 };
a = foo (a);
if (a[0] != 0)
__builtin_abort ();
}
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