Commit c8ffe46f by Roger Sayle Committed by Hans-Peter Nilsson

20020720-1.x: Skip test on mmix-knuth-mmixware.

	* gcc.c-torture/execute/20020720-1.x: Skip test on
	mmix-knuth-mmixware.  Correct comment.

Co-Authored-By: Hans-Peter Nilsson <hp@bitrange.com>

From-SVN: r56708
parent 39abf68d
2002-08-31 Roger Sayle <roger@eyesopen.com>
Hans-Peter Nilsson <hp@bitrange.com>
* gcc.c-torture/execute/20020720-1.x: Skip test on
mmix-knuth-mmixware. Correct comment.
2002-08-27 Mark Mitchell <mark@codesourcery.com>
* testsuite/g++.dg/abi/bitfield5.C: New test.
......
# The following targets fail 20020720-1.c for several reasons:
# (1) They implement floating point instructions via software, or
# (2) Their machine descriptions obfuscate the "abs(x) < 0.0" comparison.
# For example, 1 insn performs abs, 1 insn loads 0.0, 1 insn sets
# CCmode flags based upon the FP comparison, and a 4th insn makes
# a conditional branch based upon the appropriate bits in the flags.
# If the intermediate comparison can't be recognized, the combiner
# is unable to optimize all four RTL instructions simultaneously.
# (2) The "abs(x) < 0.0" comparison is split up in too many intermediate
# insns for combine to handle -- it can handle max three insns
# simultaneously. For example, for RISCy machines it is common that 1
# insn performs abs, 1 insn loads 0.0, 1 insn sets CCmode flags based
# upon the FP comparison, and a 4th insn makes a conditional branch
# based upon the appropriate bits in the flags. On the other hand, if
# for example the comparison insn takes 0.0 as an operand, the
# combiner is able to see all intermediate instructions simultaneously
# and can make the optimization.
if { [istarget "powerpc-*-*"] || [istarget "rs6000-*-*"] \
|| [istarget "mips*-*-*"] || [istarget "xtensa-*-*"] \
|| [istarget "sh-*-*"] } {
|| [istarget "sh-*-*"] || [istarget "mmix-*-*"] } {
return 1
}
......
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