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riscv-gcc-1
Commit c8e18a2b by Tom Wood
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(define_function_unit): Change meaning to ISSUE-DELAY. 

From-SVN: r1946
parent f6601f3a
Showing with 53 additions and 50 deletions
gcc/config/a29k/a29k.md
...@@ -47,8 +47,11 @@ ...@@ -47,8 +47,11 @@
[(eq_attr "in_delay_slot" "yes") (nil) (nil)]) [(eq_attr "in_delay_slot" "yes") (nil) (nil)])
;; Define the function unit usages. We first define memory as a unit. ;; Define the function unit usages. We first define memory as a unit.
(define_function_unit "memory" 1 2 (eq_attr "type" "load") 6 11) (define_function_unit "memory" 1 0 (eq_attr "type" "load") 6 5
(define_function_unit "memory" 1 2 (eq_attr "type" "store") 1 0) [(eq_attr "type" "load")])
(define_function_unit "memory" 1 0 (eq_attr "type" "load") 6 6
[(eq_attr "type" "store")])
(define_function_unit "memory" 1 0 (eq_attr "type" "store") 1 0)
;; Now define the function units for the floating-point support. Most ;; Now define the function units for the floating-point support. Most
;; units are pipelined and can accept an input every cycle. ;; units are pipelined and can accept an input every cycle.
...@@ -59,14 +62,14 @@ ...@@ -59,14 +62,14 @@
;; floating-point rounder. It isn't clear how to represent this. ;; floating-point rounder. It isn't clear how to represent this.
(define_function_unit "multiplier" 1 0 (eq_attr "type" "fmul") 3 0) (define_function_unit "multiplier" 1 0 (eq_attr "type" "fmul") 3 0)
(define_function_unit "multiplier" 1 0 (eq_attr "type" "dmul") 6 8) (define_function_unit "multiplier" 1 0 (eq_attr "type" "dmul") 6 4)
(define_function_unit "multiplier" 1 0 (eq_attr "type" "fam") 6 8) (define_function_unit "multiplier" 1 0 (eq_attr "type" "fam") 6 0)
(define_function_unit "multiplier" 1 0 (eq_attr "type" "dam") 9 8) (define_function_unit "multiplier" 1 0 (eq_attr "type" "dam") 9 4)
(define_function_unit "adder" 1 0 (eq_attr "type" "fadd,fam,dam") 3 0) (define_function_unit "adder" 1 0 (eq_attr "type" "fadd,fam,dam") 3 0)
(define_function_unit "divider" 1 1 (eq_attr "type" "fdiv") 11 20) (define_function_unit "divider" 1 0 (eq_attr "type" "fdiv") 11 10)
(define_function_unit "divider" 1 1 (eq_attr "type" "ddiv") 18 34) (define_function_unit "divider" 1 0 (eq_attr "type" "ddiv") 18 17)
;; ADD ;; ADD
(define_insn "addsi3" (define_insn "addsi3"
......
gcc/config/i960/i960.md
...@@ -48,7 +48,7 @@ ...@@ -48,7 +48,7 @@
(set_attr "type" "multi")]) (set_attr "type" "multi")])
;; (define_function_unit {name} {num-units} {n-users} {test} ;; (define_function_unit {name} {num-units} {n-users} {test}
;; {ready-delay} {busy-delay} [{conflict-list}]) ;; {ready-delay} {issue-delay} [{conflict-list}])
;; The integer ALU ;; The integer ALU
(define_function_unit "alu" 2 0 (eq_attr "type" "arith,compare,move,address") 1 0) (define_function_unit "alu" 2 0 (eq_attr "type" "arith,compare,move,address") 1 0)
......
gcc/config/mips/mips.md
...@@ -123,7 +123,7 @@ ...@@ -123,7 +123,7 @@
;; ......................... ;; .........................
; (define_function_unit NAME MULTIPLICITY SIMULTANEITY ; (define_function_unit NAME MULTIPLICITY SIMULTANEITY
; TEST READY-DELAY BUSY-DELAY [CONFLICT-LIST]) ; TEST READY-DELAY ISSUE-DELAY [CONFLICT-LIST])
;; Make the default case (PROCESSOR_DEFAULT) handle the worst case ;; Make the default case (PROCESSOR_DEFAULT) handle the worst case
...@@ -144,125 +144,125 @@ ...@@ -144,125 +144,125 @@
(define_function_unit "imuldiv" 1 1 (define_function_unit "imuldiv" 1 1
(and (eq_attr "type" "imul") (eq_attr "cpu" "!r3000,r4000")) (and (eq_attr "type" "imul") (eq_attr "cpu" "!r3000,r4000"))
17 34) 17 0)
(define_function_unit "imuldiv" 1 1 (define_function_unit "imuldiv" 1 1
(and (eq_attr "type" "imul") (eq_attr "cpu" "r3000")) (and (eq_attr "type" "imul") (eq_attr "cpu" "r3000"))
12 24) 12 0)
(define_function_unit "imuldiv" 1 1 (define_function_unit "imuldiv" 1 1
(and (eq_attr "type" "imul") (eq_attr "cpu" "r4000")) (and (eq_attr "type" "imul") (eq_attr "cpu" "r4000"))
10 20) 10 0)
(define_function_unit "imuldiv" 1 1 (define_function_unit "imuldiv" 1 1
(and (eq_attr "type" "idiv") (eq_attr "cpu" "!r3000,r4000")) (and (eq_attr "type" "idiv") (eq_attr "cpu" "!r3000,r4000"))
38 76) 38 0)
(define_function_unit "imuldiv" 1 1 (define_function_unit "imuldiv" 1 1
(and (eq_attr "type" "idiv") (eq_attr "cpu" "r3000")) (and (eq_attr "type" "idiv") (eq_attr "cpu" "r3000"))
35 70) 35 0)
(define_function_unit "imuldiv" 1 1 (define_function_unit "imuldiv" 1 1
(and (eq_attr "type" "idiv") (eq_attr "cpu" "r4000")) (and (eq_attr "type" "idiv") (eq_attr "cpu" "r4000"))
69 138) 69 0)
(define_function_unit "adder" 1 1 (define_function_unit "adder" 1 1
(and (eq_attr "type" "fadd") (eq_attr "cpu" "!r3000,r6000")) (and (eq_attr "type" "fadd") (eq_attr "cpu" "!r3000,r6000"))
4 8) 4 0)
(define_function_unit "adder" 1 1 (define_function_unit "adder" 1 1
(and (eq_attr "type" "fadd") (eq_attr "cpu" "r3000")) (and (eq_attr "type" "fadd") (eq_attr "cpu" "r3000"))
2 4) 2 0)
(define_function_unit "adder" 1 1 (define_function_unit "adder" 1 1
(and (eq_attr "type" "fadd") (eq_attr "cpu" "r6000")) (and (eq_attr "type" "fadd") (eq_attr "cpu" "r6000"))
3 6) 3 0)
(define_function_unit "adder" 1 1 (define_function_unit "adder" 1 1
(and (eq_attr "type" "fabs,fneg") (eq_attr "cpu" "!r3000")) (and (eq_attr "type" "fabs,fneg") (eq_attr "cpu" "!r3000"))
2 4) 2 0)
(define_function_unit "adder" 1 1 (define_function_unit "adder" 1 1
(and (eq_attr "type" "fabs,fneg") (eq_attr "cpu" "r3000")) (and (eq_attr "type" "fabs,fneg") (eq_attr "cpu" "r3000"))
1 2) 1 0)
(define_function_unit "mult" 1 1 (define_function_unit "mult" 1 1
(and (eq_attr "type" "fmul") (and (eq_attr "mode" "SF") (eq_attr "cpu" "!r3000,r6000"))) (and (eq_attr "type" "fmul") (and (eq_attr "mode" "SF") (eq_attr "cpu" "!r3000,r6000")))
7 14) 7 0)
(define_function_unit "mult" 1 1 (define_function_unit "mult" 1 1
(and (eq_attr "type" "fmul") (and (eq_attr "mode" "SF") (eq_attr "cpu" "r3000"))) (and (eq_attr "type" "fmul") (and (eq_attr "mode" "SF") (eq_attr "cpu" "r3000")))
4 8) 4 0)
(define_function_unit "mult" 1 1 (define_function_unit "mult" 1 1
(and (eq_attr "type" "fmul") (and (eq_attr "mode" "SF") (eq_attr "cpu" "r6000"))) (and (eq_attr "type" "fmul") (and (eq_attr "mode" "SF") (eq_attr "cpu" "r6000")))
5 10) 5 0)
(define_function_unit "mult" 1 1 (define_function_unit "mult" 1 1
(and (eq_attr "type" "fmul") (and (eq_attr "mode" "DF") (eq_attr "cpu" "!r3000,r6000"))) (and (eq_attr "type" "fmul") (and (eq_attr "mode" "DF") (eq_attr "cpu" "!r3000,r6000")))
8 16) 8 0)
(define_function_unit "mult" 1 1 (define_function_unit "mult" 1 1
(and (eq_attr "type" "fmul") (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3000"))) (and (eq_attr "type" "fmul") (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3000")))
5 10) 5 0)
(define_function_unit "mult" 1 1 (define_function_unit "mult" 1 1
(and (eq_attr "type" "fmul") (and (eq_attr "mode" "DF") (eq_attr "cpu" "r6000"))) (and (eq_attr "type" "fmul") (and (eq_attr "mode" "DF") (eq_attr "cpu" "r6000")))
6 12) 6 0)
(define_function_unit "divide" 1 1 (define_function_unit "divide" 1 1
(and (eq_attr "type" "fdiv") (and (eq_attr "mode" "SF") (eq_attr "cpu" "!r3000,r6000"))) (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "SF") (eq_attr "cpu" "!r3000,r6000")))
23 46) 23 0)
(define_function_unit "divide" 1 1 (define_function_unit "divide" 1 1
(and (eq_attr "type" "fdiv") (and (eq_attr "mode" "SF") (eq_attr "cpu" "r3000"))) (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "SF") (eq_attr "cpu" "r3000")))
12 24) 12 0)
(define_function_unit "divide" 1 1 (define_function_unit "divide" 1 1
(and (eq_attr "type" "fdiv") (and (eq_attr "mode" "SF") (eq_attr "cpu" "r6000"))) (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "SF") (eq_attr "cpu" "r6000")))
15 30) 15 0)
(define_function_unit "divide" 1 1 (define_function_unit "divide" 1 1
(and (eq_attr "type" "fdiv") (and (eq_attr "mode" "DF") (eq_attr "cpu" "!r3000,r6000"))) (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "DF") (eq_attr "cpu" "!r3000,r6000")))
36 72) 36 0)
(define_function_unit "divide" 1 1 (define_function_unit "divide" 1 1
(and (eq_attr "type" "fdiv") (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3000"))) (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3000")))
19 34) 19 0)
(define_function_unit "divide" 1 1 (define_function_unit "divide" 1 1
(and (eq_attr "type" "fdiv") (and (eq_attr "mode" "DF") (eq_attr "cpu" "r6000"))) (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "DF") (eq_attr "cpu" "r6000")))
16 32) 16 0)
(define_function_unit "divide" 1 1 (and (eq_attr "type" "fsqrt") (eq_attr "mode" "SF")) 54 108) (define_function_unit "divide" 1 1 (and (eq_attr "type" "fsqrt") (eq_attr "mode" "SF")) 54 0)
(define_function_unit "divide" 1 1 (and (eq_attr "type" "fsqrt") (eq_attr "mode" "DF")) 112 224) (define_function_unit "divide" 1 1 (and (eq_attr "type" "fsqrt") (eq_attr "mode" "DF")) 112 0)
;; The following functional units do not use the cpu type, and use ;; The following functional units do not use the cpu type, and use
;; much less memory in genattrtab.c. ;; much less memory in genattrtab.c.
;; (define_function_unit "memory" 1 0 (eq_attr "type" "load") 3 0) ;; (define_function_unit "memory" 1 0 (eq_attr "type" "load") 3 0)
;; (define_function_unit "memory" 1 0 (eq_attr "type" "store") 1 0) ;; (define_function_unit "memory" 1 0 (eq_attr "type" "store") 1 0)
;; ;;
;; (define_function_unit "fp_comp" 1 0 (eq_attr "type" "fcmp") 2 0) ;; (define_function_unit "fp_comp" 1 0 (eq_attr "type" "fcmp") 2 0)
;; ;;
;; (define_function_unit "transfer" 1 0 (eq_attr "type" "xfer") 2 0) ;; (define_function_unit "transfer" 1 0 (eq_attr "type" "xfer") 2 0)
;; (define_function_unit "transfer" 1 0 (eq_attr "type" "hilo") 3 0) ;; (define_function_unit "transfer" 1 0 (eq_attr "type" "hilo") 3 0)
;; ;;
;; (define_function_unit "imuldiv" 1 1 (eq_attr "type" "imul") 17 34) ;; (define_function_unit "imuldiv" 1 1 (eq_attr "type" "imul") 17 0)
;; (define_function_unit "imuldiv" 1 1 (eq_attr "type" "idiv") 38 76) ;; (define_function_unit "imuldiv" 1 1 (eq_attr "type" "idiv") 38 0)
;; ;;
;; (define_function_unit "adder" 1 1 (eq_attr "type" "fadd") 4 8) ;; (define_function_unit "adder" 1 1 (eq_attr "type" "fadd") 4 0)
;; (define_function_unit "adder" 1 1 (eq_attr "type" "fabs,fneg") 2 4) ;; (define_function_unit "adder" 1 1 (eq_attr "type" "fabs,fneg") 2 0)
;; ;;
;; (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") (eq_attr "mode" "SF")) 7 14) ;; (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") (eq_attr "mode" "SF")) 7 0)
;; (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") (eq_attr "mode" "DF")) 8 16) ;; (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") (eq_attr "mode" "DF")) 8 0)
;; ;;
;; (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") (eq_attr "mode" "SF")) 23 46) ;; (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") (eq_attr "mode" "SF")) 23 0)
;; (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") (eq_attr "mode" "DF")) 36 72) ;; (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") (eq_attr "mode" "DF")) 36 0)
;; ;;
;; (define_function_unit "sqrt" 1 1 (and (eq_attr "type" "fsqrt") (eq_attr "mode" "SF")) 54 108) ;; (define_function_unit "sqrt" 1 1 (and (eq_attr "type" "fsqrt") (eq_attr "mode" "SF")) 54 0)
;; (define_function_unit "sqrt" 1 1 (and (eq_attr "type" "fsqrt") (eq_attr "mode" "DF")) 112 224) ;; (define_function_unit "sqrt" 1 1 (and (eq_attr "type" "fsqrt") (eq_attr "mode" "DF")) 112 0)
;; ;;
......
gcc/config/pa/pa.md
...@@ -94,7 +94,7 @@ ...@@ -94,7 +94,7 @@
;; constraints shouldn't hurt. ;; constraints shouldn't hurt.
;; (define_function_unit {name} {num-units} {n-users} {test} ;; (define_function_unit {name} {num-units} {n-users} {test}
;; {ready-delay} {busy-delay} [{conflict-list}]) ;; {ready-delay} {issue-delay} [{conflict-list}])
;; The integer ALU. ;; The integer ALU.
;; (Noted only for documentation; units that take one cycle do not need to ;; (Noted only for documentation; units that take one cycle do not need to
......
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