peep2-xsrand.c, [...]: Drop redundant target-specifier.

	* gcc.target/cris/peep2-xsrand.c, gcc.target/cris/asmreg-1.c,
	gcc.target/cris/peep2-andu1.c, gcc.target/cris/peep2-xsrand2.c,
	gcc.target/cris/20011127-1.c: Drop redundant target-specifier.
	* gcc.target/cris/peep2-andu2.c: Ditto.  Make dg-do assemble and
	add -save-temps.
	* gcc.target/cris/torture/cris-torture.exp,
	gcc.target/cris/cris.exp: Run for crisv32-*-* too.
	* gcc.target/cris/builtin_ctz_v3.c,
	gcc.target/cris/builtin_ctz_v8.c,
	gcc.target/cris/builtin_clz_v0.c,
	gcc.target/cris/builtin_clz_v3.c,
	gcc.target/cris/builtin_bswap_v3.c,
	gcc.target/cris/builtin_bswap_v8.c, gcc.dg/sibcall-4.c,
	gcc.dg/pr19340.c, gcc.dg/20020919-1.c, gcc.dg/pr31866.c,
	gcc.dg/torture/cris-asm-mof-1.c, gcc.dg/torture/cris-volatile-1.c,
	gcc.dg/weak/typeof-2.c, gcc.dg/tree-ssa/loop-1.c,
	gcc.dg/tree-ssa/20040204-1.c, gcc.dg/sibcall-3.c,
	lib/target-supports.exp: Adjust for crisv32-*-*.

From-SVN: r130962

gcc/testsuite/ChangeLog

+2007-12-15  Hans-Peter Nilsson  <hp@axis.com>
+
+	* gcc.target/cris/peep2-xsrand.c, gcc.target/cris/asmreg-1.c,
+	gcc.target/cris/peep2-andu1.c, gcc.target/cris/peep2-xsrand2.c,
+	gcc.target/cris/20011127-1.c: Drop redundant target-specifier.
+	* gcc.target/cris/peep2-andu2.c: Ditto.  Make dg-do assemble and
+	add -save-temps.
+	* gcc.target/cris/torture/cris-torture.exp,
+	gcc.target/cris/cris.exp: Run for crisv32-*-* too.
+	* gcc.target/cris/builtin_ctz_v3.c,
+	gcc.target/cris/builtin_ctz_v8.c,
+	gcc.target/cris/builtin_clz_v0.c,
+	gcc.target/cris/builtin_clz_v3.c,
+	gcc.target/cris/builtin_bswap_v3.c,
+	gcc.target/cris/builtin_bswap_v8.c, gcc.dg/sibcall-4.c,
+	gcc.dg/pr19340.c, gcc.dg/20020919-1.c, gcc.dg/pr31866.c,
+	gcc.dg/torture/cris-asm-mof-1.c, gcc.dg/torture/cris-volatile-1.c,
+	gcc.dg/weak/typeof-2.c, gcc.dg/tree-ssa/loop-1.c,
+	gcc.dg/tree-ssa/20040204-1.c, gcc.dg/sibcall-3.c,
+	lib/target-supports.exp: Adjust for crisv32-*-*.
+
 2007-12-15  Alexandre Oliva  <aoliva@redhat.com>
 
 	* gcc.dg/debug/const-3.c: New.

gcc/testsuite/gcc.dg/20020919-1.c

@@ -8,7 +8,7 @@
    You must be this tall ---> fit two long longs in asm-declared registers
    to enter this amusement.  */
 
-/* { dg-do compile { target alpha-*-* cris-*-* i?86-*-* mmix-*-* powerpc*-*-* rs6000-*-* x86_64-*-* } } */
+/* { dg-do compile { target alpha-*-* cris-*-* crisv32-*-* i?86-*-* mmix-*-* powerpc*-*-* rs6000-*-* x86_64-*-* } } */
 /* { dg-options "-O2" } */
 
 /* Constructed examples; input/output (same register), output, input, and

gcc/testsuite/gcc.dg/pr19340.c

 /* { dg-do compile } */
 /* { dg-options "-O1 -fschedule-insns2 -fsched2-use-traces" } */
-/* { dg-skip-if "No scheduling" { mmix-*-* cris-*-* fido-*-* m68k-*-* m32c-*-* } { "*" } { "" } } */
+/* { dg-skip-if "No scheduling" { mmix-*-* cris-*-* crisv32-*-* fido-*-* m68k-*-* m32c-*-* } { "*" } { "" } } */
 
 extern double f (double x);
 

gcc/testsuite/gcc.dg/pr31866.c

 /* PR tree-optimization/31866 */
-/* { dg-do compile { target alpha-*-* cris-*-* i?86-*-* mmix-*-* powerpc*-*-* rs6000-*-* x86_64-*-* } } */
+/* { dg-do compile { target alpha-*-* cris-*-* crisv32-*-* i?86-*-* mmix-*-* powerpc*-*-* rs6000-*-* x86_64-*-* } } */
 /* { dg-options "-O2" } */
 
 #if defined (__alpha__)

gcc/testsuite/gcc.dg/sibcall-3.c

@@ -5,7 +5,7 @@
    Copyright (C) 2002 Free Software Foundation Inc.
    Contributed by Hans-Peter Nilsson  <hp@bitrange.com>  */
 
-/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
+/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
 /* -mlongcall disables sibcall patterns.  */
 /* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
 /* { dg-options "-O2 -foptimize-sibling-calls" } */

gcc/testsuite/gcc.dg/sibcall-4.c

@@ -5,7 +5,7 @@
    Copyright (C) 2002 Free Software Foundation Inc.
    Contributed by Hans-Peter Nilsson  <hp@bitrange.com>  */
 
-/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
+/* { dg-do run { xfail arc-*-* avr-*-* c4x-*-* cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* m68hc1?-*-* mcore-*-* mn10300-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa-*-* } } */
 /* -mlongcall disables sibcall patterns.  */
 /* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
 /* { dg-options "-O2 -foptimize-sibling-calls" } */

gcc/testsuite/gcc.dg/torture/cris-asm-mof-1.c

-/* { dg-do compile { target cris-*-* } } */
-/* { dg-skip-if "" { cris-*-* } { "-march*" } { "" } } */
+/* { dg-do compile { target cris-*-* crisv32-*-* } } */
+/* { dg-skip-if "" { cris*-*-* } { "-march*" } { "" } } */
 /* { dg-options "-O2 -march=v10" } */
 /* { dg-final { scan-assembler "in-asm: .mof" } } */
 /* { dg-final { scan-assembler "out-asm: .mof" } } */

gcc/testsuite/gcc.dg/torture/cris-volatile-1.c

@@ -2,7 +2,7 @@
    Check that size-optimizations for move insns (specifically peephole
    optimizations) aren't applied to volatile objects in the CRIS port.
    Origin: Hans-Peter Nilsson.  */
-/* { dg-do compile { target cris-*-* } } */
+/* { dg-do compile { target cris-*-* crisv32-*-* } } */
 /* { dg-final { scan-assembler-not {movu\...\[} } } */
 /* { dg-final { scan-assembler-not {move\.[^d].\[} } } */
 /* { dg-final { scan-assembler-not {and\.[^d].\[} } } */

gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c

@@ -33,5 +33,5 @@ void test55 (int x, int y)
    that the && should be emitted (based on BRANCH_COST).  Fix this
    by teaching dom to look through && and register all components
    as true.  */
-/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "powerpc*-*-* cris-*-* mmix-*-* mips*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "powerpc*-*-* cris-*-* crisv32-*-* mmix-*-* mips*-*-*" } } } } */
 /* { dg-final { cleanup-tree-dump "optimized" } } */

gcc/testsuite/gcc.dg/tree-ssa/loop-1.c

@@ -39,7 +39,7 @@ void xxx(void)
 /* CRIS keeps the address in a register.  */
 /* m68k sometimes puts the address in a register, depending on CPU and PIC.  */
 
-/* { dg-final { scan-assembler-times "foo" 5 { xfail hppa*-*-* ia64*-*-* sh*-*-* cris-*-* fido-*-* m68k-*-* } } } */
+/* { dg-final { scan-assembler-times "foo" 5 { xfail hppa*-*-* ia64*-*-* sh*-*-* cris-*-* crisv32-*-* fido-*-* m68k-*-* } } } */
 /* { dg-final { scan-assembler-times "foo,%r" 5 { target hppa*-*-* } } } */
 /* { dg-final { scan-assembler-times "= foo"  5 { target ia64*-*-* } } } */
 /* { dg-final { scan-assembler-times "jsr|bsrf|blink\ttr?,r18"  5 { target sh*-*-* } } } */

gcc/testsuite/gcc.dg/weak/typeof-2.c

@@ -39,6 +39,7 @@ int bar3 (int x)
 // { dg-final { if [string match s390*-*-* $target_triplet ] {return} } }
 // Likewise for CRIS targets.
 // { dg-final { if [string match cris-*-* $target_triplet ] {return} } }
+// { dg-final { if [string match crisv32-*-* $target_triplet ] {return} } }
 // Likewise for m68k targets.
 // { dg-final { if [string match fido-*-* $target_triplet ] {return} } }
 // { dg-final { if [string match m68k-*-* $target_triplet ] {return} } }

gcc/testsuite/gcc.target/cris/20011127-1.c

@@ -3,9 +3,9 @@
 
    Making sure that invalid asm operand modifiers don't cause an ICE.  */
 
-/* { dg-do compile { target cris-*-* } } */
+/* { dg-do compile } */
 /* { dg-options "-O2" } */
-/* { dg-message "reg:SI|const_double:DF" "prune debug_rtx output" { target cris-*-* } 0 } */
+/* { dg-message "reg:SI|const_double:DF" "prune debug_rtx output" { target *-*-* } 0 } */
 
 void
 foo (void)

gcc/testsuite/gcc.target/cris/asmreg-1.c

-/* { dg-do compile { target cris-*-* } } */
+/* { dg-do compile } */
 /* { dg-options "-O2" } */
 /* { dg-final { scan-assembler "\\\.ifnc \\\$r9-\\\$r10-\\\$r11-\\\$r12" } } */
 

gcc/testsuite/gcc.target/cris/builtin_bswap_v3.c

 /* Check that we don't use the swap insn for bswap by checking assembler 
    output.  The swap instruction was added in v8.  */
 /* { dg-do compile } */
-/* { dg-skip-if "" { "cris-*-elf" } { "-march*" } { "" } } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
 /* { dg-options "-O2 -march=v3" } */
 /* { dg-final { scan-assembler-not "\[ \t\]swapwb\[ \t\]" } } */
 

gcc/testsuite/gcc.target/cris/builtin_bswap_v8.c

 /* Check that we use the swap insn for bswap by checking assembler
    output.  The swap instruction was added in v8.  */
 /* { dg-do compile } */
-/* { dg-skip-if "" { "cris-*-elf" } { "-march*" } { "" } } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
 /* { dg-options "-O2 -march=v8" } */
 /* { dg-final { scan-assembler "\[ \t\]swapwb\[ \t\]" } } */
 

gcc/testsuite/gcc.target/cris/builtin_clz_v0.c

 /* Check that we don't use the lz insn for clz by checking assembler output.
    The lz insn was implemented in CRIS v3 (ETRAX 4).  */
 /* { dg-do compile } */
-/* { dg-skip-if "" { "cris-*-elf" } { "-march*" } { "" } } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
 /* { dg-options "-O2 -march=v0" } */
 /* { dg-final { scan-assembler-not "\[ \t\]lz\[ \t\]" } } */
 

gcc/testsuite/gcc.target/cris/builtin_clz_v3.c

 /* Check that we use the lz insn for clz by checking assembler output.
    The lz insn was implemented in CRIS v3 (ETRAX 4).  */
 /* { dg-do compile } */
-/* { dg-skip-if "" { "cris-*-elf" } { "-march*" } { "" } } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
 /* { dg-options "-O2 -march=v3" } */
 /* { dg-final { scan-assembler "\[ \t\]lz\[ \t\]" } } */
 

gcc/testsuite/gcc.target/cris/builtin_ctz_v3.c

 /* Check that we don't use the swap insn for ctz by checking
    assembler output.  The swap instruction was implemented in v8.  */
 /* { dg-do compile } */
-/* { dg-skip-if "" { "cris-*-elf" } { "-march*" } { "" } } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
 /* { dg-options "-O2 -march=v3" } */
 /* { dg-final { scan-assembler-not "\[ \t\]swapwbr\[ \t\]" } } */
 

gcc/testsuite/gcc.target/cris/builtin_ctz_v8.c

 /* Check that we use the swap insn for ctz by checking assembler output.
    The swap instruction was implemented in v8.  */
 /* { dg-do compile } */
-/* { dg-skip-if "" { "cris-*-elf" } { "-march*" } { "" } } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
 /* { dg-options "-O2 -march=v8" } */
 /* { dg-final { scan-assembler "\[ \t\]swapwbr\[ \t\]" } } */
 

gcc/testsuite/gcc.target/cris/cris.exp

@@ -18,7 +18,7 @@
 # looping over tests.
 
 # Exit immediately if this isn't a CRIS target.
-if ![istarget cris-*-*] then {
+if { ![istarget cris-*-*] && ![istarget crisv32-*-*] } then {
   return
 }
 

gcc/testsuite/gcc.target/cris/peep2-andu1.c

-/* { dg-do compile { target cris-*-* } } */
+/* { dg-do compile } */
 /* { dg-final { scan-assembler-not "and.d " } } */
 /* { dg-final { scan-assembler-not "move.d " } } */
 /* { dg-final { scan-assembler "cLear.b" } } */

gcc/testsuite/gcc.target/cris/peep2-andu2.c

-/* { dg-do compile { target cris-*-* } } */
-/* { dg-final { scan-assembler "movu.w \\\$r10,\\\$r" } } */
-/* { dg-final { scan-assembler "and.w 2047,\\\$r" } } */
-/* { dg-final { scan-assembler-not "move.d \\\$r10,\\\$r" } } */
-/* { dg-final { scan-assembler "movu.b \\\$r10,\\\$r" } } */
-/* { dg-final { scan-assembler "and.b 95,\\\$r" } } */
-/* { dg-final { scan-assembler "andq -2,\\\$r" } } */
-/* { dg-options "-O2" } */
+/* { dg-do assemble } */
+/* { dg-final { scan-assembler "movu.w \\\$r10,\\\$" } } */
+/* { dg-final { scan-assembler "and.w 2047,\\\$" } } */
+/* { dg-final { scan-assembler-not "move.d \\\$r10,\\\$" } } */
+/* { dg-final { scan-assembler "movu.b \\\$r10,\\\$" } } */
+/* { dg-final { scan-assembler "and.b 95,\\\$" } } */
+/* { dg-final { scan-assembler "andq -2,\\\$" } } */
+/* { dg-options "-O2 -save-temps" } */
 
 /* Test the "andu" peephole2 trivially, register operand.  */
 

gcc/testsuite/gcc.target/cris/peep2-xsrand.c

-/* { dg-do compile { target cris-*-* } } */
+/* { dg-do compile } */
 /* { dg-final { scan-assembler "and.w " } } */
 /* { dg-final { scan-assembler "and.b " } } */
 /* { dg-final { scan-assembler-not "and.d" } } */

gcc/testsuite/gcc.target/cris/peep2-xsrand2.c

-/* { dg-do compile { target cris-*-* } } */
+/* { dg-do compile } */
 /* { dg-final { scan-assembler "and.w -137," } } */
 /* { dg-final { scan-assembler "and.b -64," } } */
 /* { dg-final { scan-assembler "and.w -139," } } */

gcc/testsuite/gcc.target/cris/torture/cris-torture.exp

@@ -18,7 +18,7 @@
 # optimization options.
 
 # Exit immediately if this isn't a CRIS target.
-if ![istarget cris-*-*] then {
+if { ![istarget cris-*-*] && ![istarget crisv32-*-*] } then {
   return
 }
 

gcc/testsuite/lib/target-supports.exp

@@ -421,6 +421,7 @@ proc check_profiling_available { test_what } {
 	     || [istarget strongarm*-*-elf]
 	     || [istarget xscale*-*-elf]
 	     || [istarget cris-*-*]
+	     || [istarget crisv32-*-*]
 	     || [istarget fido-*-elf]
 	     || [istarget h8300-*-*]
 	     || [istarget m32c-*-elf]