re PR target/64659 ([SH] Immedate values not used for atomic ops)

gcc/
	PR target/64659
	* config/sh/predicates.md (atomic_arith_operand,
	atomic_logical_operand): Remove.
	* config/sh/sync.md (fetchop_predicate, fetchop_constraint): Remove.
	(atomic_arith_operand_0): New predicate.
	(atomic_compare_and_swap<mode>): Use arith_reg_dest for output values.
	Use atomic_arith_operand_0 for input values.
	(atomic_compare_and_swapsi_hard, atomic_compare_and_swap<mode>_hard,
	atomic_compare_and_swap<mode>_soft_gusa,
	atomic_compare_and_swap<mode>_soft_tcb,
	atomic_compare_and_swap<mode>_soft_imask): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.
	(atomic_exchange<mode>): Use arith_reg_dest for output value.  Use
	atomic_arith_operand_0 for newval input.
	(atomic_exchangesi_hard, atomic_exchange<mode>_hard,
	atomic_exchange<mode>_soft_gusa, atomic_exchange<mode>_soft_tcb,
	atomic_exchange<mode>_soft_imask): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.
	(atomic_arith_operand_1, atomic_logical_operand_1): New predicates.
	fetchop_predicate_1, fetchop_constraint_1_llcs,
	fetchop_constraint_1_gusa, fetchop_constraint_1_tcb,
	fetchop_constraint_1_imask): New code iterator attributes.
	(atomic_fetch_<fetchop_name><mode>): Use arith_reg_dest instead of
	register_operand.  Use fetchop_predicate_1.
	(atomic_fetch_<fetchop_name>si_hard,
	atomic_fetch_<fetchop_name><mode>_hard): Use arith_reg_dest instead of
	register_operand.  Use fetchop_predicate_1, fetchop_constraint_1_llcs.
	(atomic_fetch_<fetchop_name><mode>_soft_gusa): Use arith_reg_dest
	and arith_reg_operand instead of register_operand.  Use
	fetchop_predicate_1, fetchop_constraint_1_gusa.
	(atomic_fetch_<fetchop_name><mode>_soft_tcb): Use arith_reg_dest
	and arith_reg_operand instead of register_operand.  Use
	fetchop_predicate_1, fetchop_constraint_1_tcb.  Adjust asm sequence
	to allow R0 usage.
	(atomic_fetch_<fetchop_name><mode>_soft_imask): Use arith_reg_dest
	and arith_reg_operand instead of register_operand.  Use
	fetchop_predicate_1, fetchop_constraint_1_imask.  Adjust asm sequence
	to allow R0 usage.
	(atomic_fetch_nand<mode>): Use arith_reg_dest instead of
	register_operand.  Use atomic_logical_operand_1.
	(atomic_fetch_nandsi_hard, atomic_fetch_nand<mode>_hard,
	atomic_fetch_nand<mode>_soft_gusa): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.
	(atomic_fetch_nand<mode>_soft_tcb, atomic_fetch_nand<mode>_soft_imask):
	Use arith_reg_dest and arith_reg_operand instead of register_operand.
	Use logical_operand and rK08.  Adjust asm sequence to allow R0 usage.
	(atomic_<fetchop_name>_fetch<mode>): Use arith_reg_dest instead of
	register_operand.  Use fetchop_predicate_1.
	(atomic_<fetchop_name>_fetchsi_hard,
	atomic_<fetchop_name>_fetch<mode>_hard): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
	fetchop_constraint_1_llcs.
	(atomic_<fetchop_name>_fetch<mode>_soft_gusa): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
	fetchop_constraint_1_gusa.
	(atomic_<fetchop_name>_fetch<mode>_soft_tcb): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
	fetchop_constraint_1_tcb.  Adjust asm sequence to allow R0 usage.
	(atomic_<fetchop_name>_fetch<mode>_soft_imask): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
	fetchop_constraint_1_imask.  Adjust asm sequence to allow R0 usage.
	(atomic_nand_fetch<mode>): Use arith_reg_dest instead of
	register_operand.  Use atomic_logical_operand_1.
	(atomic_nand_fetchsi_hard, atomic_nand_fetch<mode>_hard,
	atomic_nand_fetch<mode>_soft_gusa): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.
	(atomic_nand_fetch<mode>_soft_tcb): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.  Use logical_operand
	and K08.  Adjust asm sequence to allow R0 usage.
	(atomic_nand_fetch<mode>_soft_imask): Use arith_reg_dest and
	arith_reg_operand instead of register_operand.  Use logical_operand
	and K08.

gcc/testsuite/
	PR target/64659
	* gcc.target/sh/sh.exp
	(check_effective_target_atomic_model_soft_gusa_available,
	check_effective_target_atomic_model_soft_tcb_available,
	check_effective_target_atomic_model_soft_imask_available,
	check_effective_target_atomic_model_hard_llcs_available): New.
	* gcc.target/sh/pr64659-0.h: New.
	* gcc.target/sh/pr64659-1.c: New.
	* gcc.target/sh/pr64659-2.c: New.
	* gcc.target/sh/pr64659-3.c: New.
	* gcc.target/sh/pr64659-4.c: New.

From-SVN: r220217

gcc/ChangeLog

+2015-01-28  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/64659
+	* config/sh/predicates.md (atomic_arith_operand,
+	atomic_logical_operand): Remove.
+	* config/sh/sync.md (fetchop_predicate, fetchop_constraint): Remove.
+	(atomic_arith_operand_0): New predicate.
+	(atomic_compare_and_swap<mode>): Use arith_reg_dest for output values.
+	Use atomic_arith_operand_0 for input values.
+	(atomic_compare_and_swapsi_hard, atomic_compare_and_swap<mode>_hard,
+	atomic_compare_and_swap<mode>_soft_gusa,
+	atomic_compare_and_swap<mode>_soft_tcb,
+	atomic_compare_and_swap<mode>_soft_imask): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.
+	(atomic_exchange<mode>): Use arith_reg_dest for output value.  Use
+	atomic_arith_operand_0 for newval input.
+	(atomic_exchangesi_hard, atomic_exchange<mode>_hard,
+	atomic_exchange<mode>_soft_gusa, atomic_exchange<mode>_soft_tcb,
+	atomic_exchange<mode>_soft_imask): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.
+	(atomic_arith_operand_1, atomic_logical_operand_1): New predicates.
+	fetchop_predicate_1, fetchop_constraint_1_llcs,
+	fetchop_constraint_1_gusa, fetchop_constraint_1_tcb,
+	fetchop_constraint_1_imask): New code iterator attributes.
+	(atomic_fetch_<fetchop_name><mode>): Use arith_reg_dest instead of
+	register_operand.  Use fetchop_predicate_1.
+	(atomic_fetch_<fetchop_name>si_hard,
+	atomic_fetch_<fetchop_name><mode>_hard): Use arith_reg_dest instead of
+	register_operand.  Use fetchop_predicate_1, fetchop_constraint_1_llcs.
+	(atomic_fetch_<fetchop_name><mode>_soft_gusa): Use arith_reg_dest
+	and arith_reg_operand instead of register_operand.  Use
+	fetchop_predicate_1, fetchop_constraint_1_gusa.
+	(atomic_fetch_<fetchop_name><mode>_soft_tcb): Use arith_reg_dest
+	and arith_reg_operand instead of register_operand.  Use
+	fetchop_predicate_1, fetchop_constraint_1_tcb.  Adjust asm sequence
+	to allow R0 usage.
+	(atomic_fetch_<fetchop_name><mode>_soft_imask): Use arith_reg_dest
+	and arith_reg_operand instead of register_operand.  Use
+	fetchop_predicate_1, fetchop_constraint_1_imask.  Adjust asm sequence
+	to allow R0 usage.
+	(atomic_fetch_nand<mode>): Use arith_reg_dest instead of
+	register_operand.  Use atomic_logical_operand_1.
+	(atomic_fetch_nandsi_hard, atomic_fetch_nand<mode>_hard,
+	atomic_fetch_nand<mode>_soft_gusa): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.
+	(atomic_fetch_nand<mode>_soft_tcb, atomic_fetch_nand<mode>_soft_imask):
+	Use arith_reg_dest and arith_reg_operand instead of register_operand.
+	Use logical_operand and rK08.  Adjust asm sequence to allow R0 usage.
+	(atomic_<fetchop_name>_fetch<mode>): Use arith_reg_dest instead of
+	register_operand.  Use fetchop_predicate_1.
+	(atomic_<fetchop_name>_fetchsi_hard,
+	atomic_<fetchop_name>_fetch<mode>_hard): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
+	fetchop_constraint_1_llcs.
+	(atomic_<fetchop_name>_fetch<mode>_soft_gusa): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
+	fetchop_constraint_1_gusa.
+	(atomic_<fetchop_name>_fetch<mode>_soft_tcb): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
+	fetchop_constraint_1_tcb.  Adjust asm sequence to allow R0 usage.
+	(atomic_<fetchop_name>_fetch<mode>_soft_imask): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.  Use fetchop_predicate_1,
+	fetchop_constraint_1_imask.  Adjust asm sequence to allow R0 usage.
+	(atomic_nand_fetch<mode>): Use arith_reg_dest instead of
+	register_operand.  Use atomic_logical_operand_1.
+	(atomic_nand_fetchsi_hard, atomic_nand_fetch<mode>_hard,
+	atomic_nand_fetch<mode>_soft_gusa): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.
+	(atomic_nand_fetch<mode>_soft_tcb): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.  Use logical_operand
+	and K08.  Adjust asm sequence to allow R0 usage.
+	(atomic_nand_fetch<mode>_soft_imask): Use arith_reg_dest and
+	arith_reg_operand instead of register_operand.  Use logical_operand
+	and K08.
+
 2015-01-28  Jakub Jelinek  <jakub@redhat.com>
 
 	PR other/63504

gcc/config/sh/predicates.md

@@ -1134,24 +1134,6 @@
   return 0;
 })
 
-;; The atomic_* operand predicates are used for the atomic patterns.
-;; Depending on the particular pattern some operands can be immediate
-;; values.  Using these predicates avoids the usage of 'force_reg' in the
-;; expanders.
-(define_predicate "atomic_arith_operand"
-  (ior (match_code "subreg,reg")
-       (and (match_test "satisfies_constraint_I08 (op)")
-	    (match_test "mode != QImode")
-	    (match_test "mode != HImode")
-	    (match_test "TARGET_SH4A"))))
-
-(define_predicate "atomic_logical_operand"
-  (ior (match_code "subreg,reg")
-       (and (match_test "satisfies_constraint_K08 (op)")
-	    (match_test "mode != QImode")
-	    (match_test "mode != HImode")
-	    (match_test "TARGET_SH4A"))))
-
 ;; A predicate that matches any expression for which there is an
 ;; insn pattern that sets the T bit.
 (define_predicate "treg_set_expr"

gcc/testsuite/ChangeLog

+2015-01-28  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/64659
+	* gcc.target/sh/sh.exp
+	(check_effective_target_atomic_model_soft_gusa_available,
+	check_effective_target_atomic_model_soft_tcb_available,
+	check_effective_target_atomic_model_soft_imask_available,
+	check_effective_target_atomic_model_hard_llcs_available): New.
+	* gcc.target/sh/pr64659-0.h: New.
+	* gcc.target/sh/pr64659-1.c: New.
+	* gcc.target/sh/pr64659-2.c: New.
+	* gcc.target/sh/pr64659-3.c: New.
+	* gcc.target/sh/pr64659-4.c: New.
+
 2015-01-28  Alex Velenko  <Alex.Velenko@arm.com>
 
 	* gcc.target/arm/atomic-op-consume.c (scan-assember-times): Adjust

gcc/testsuite/gcc.target/sh/pr64659-0.h

+/* Check that atomic ops utilize insns with immediate values.  */
+
+#define emitfuncs(name)\
+  void test_ ## name ## _0 (char* mem)\
+  {\
+    name (mem, 1, __ATOMIC_ACQ_REL);\
+  }\
+  void test_ ## name ## _1 (short* mem)\
+  {\
+    name (mem, 1, __ATOMIC_ACQ_REL);\
+  }\
+  void test_ ## name ##_2 (int* mem)\
+  {\
+    name (mem, 1, __ATOMIC_ACQ_REL);\
+  }\
+
+emitfuncs (__atomic_add_fetch)
+emitfuncs (__atomic_fetch_add)
+
+emitfuncs (__atomic_sub_fetch)
+emitfuncs (__atomic_fetch_sub)
+
+emitfuncs (__atomic_and_fetch)
+emitfuncs (__atomic_fetch_and)
+
+emitfuncs (__atomic_or_fetch)
+emitfuncs (__atomic_fetch_or)
+
+emitfuncs (__atomic_xor_fetch)
+emitfuncs (__atomic_fetch_xor)
+
+emitfuncs (__atomic_nand_fetch)
+emitfuncs (__atomic_fetch_nand)
+
+void
+test___atomic_compare_exchange_0 (char* mem)
+{
+  char expected = 1;
+  char desired = 5;
+  __atomic_compare_exchange (mem, &expected, &desired, 0, __ATOMIC_ACQ_REL,
+			     __ATOMIC_RELAXED);
+}
+
+void
+test___atomic_compare_exchange_1 (short* mem)
+{
+  short expected = 1;
+  short desired = 5;
+  __atomic_compare_exchange (mem, &expected, &desired, 0, __ATOMIC_ACQ_REL,
+			     __ATOMIC_RELAXED);
+}
+
+void
+test___atomic_compare_exchange_2 (int* mem)
+{
+  int expected = 1;
+  int desired = 5;
+  __atomic_compare_exchange (mem, &expected, &desired, 0, __ATOMIC_ACQ_REL,
+			     __ATOMIC_RELAXED);
+}

gcc/testsuite/gcc.target/sh/pr64659-1.c

+/* Check that atomic ops utilize insns with immediate values.  */
+/* { dg-do compile { target { atomic_model_soft_gusa_available } } }  */
+/* { dg-options "-O2 -matomic-model=soft-gusa,strict" }  */
+/* { dg-final { scan-assembler-times "add\t#1" 6 } }  */
+/* { dg-final { scan-assembler-times "add\t#-1" 6 } }  */
+
+#include "pr64659-0.h"

gcc/testsuite/gcc.target/sh/pr64659-2.c

+/* Check that atomic ops utilize insns with immediate values.  */
+/* { dg-do compile { target { atomic_model_soft_tcb_available } } }  */
+/* { dg-options "-O2 -matomic-model=soft-tcb,gbr-offset=0,strict" }  */
+/* { dg-final { scan-assembler-times "add\t#1" 6 } }  */
+/* { dg-final { scan-assembler-times "add\t#-1" 6 } }  */
+/* { dg-final { scan-assembler-times "and\t#1" 12 } }  */
+/* { dg-final { scan-assembler-times "\tor\t#1" 6 } }  */
+/* { dg-final { scan-assembler-times "xor\t#1" 6 } }  */
+
+#include "pr64659-0.h"

gcc/testsuite/gcc.target/sh/pr64659-3.c

+/* Check that atomic ops utilize insns with immediate values.  */
+/* { dg-do compile { target { atomic_model_soft_imask_available } } }  */
+/* { dg-options "-O2 -matomic-model=soft-imask,strict -mno-usermode" }  */
+/* { dg-final { scan-assembler-times "add\t#1" 6 } }  */
+/* { dg-final { scan-assembler-times "add\t#-1" 6 } }  */
+/* { dg-final { scan-assembler-times "and\t#1" 12 } }  */
+/* { dg-final { scan-assembler-times "\tor\t#1" 6 } }  */
+/* { dg-final { scan-assembler-times "xor\t#1" 6 } }  */
+
+#include "pr64659-0.h"

gcc/testsuite/gcc.target/sh/pr64659-4.c

+/* Check that atomic ops utilize insns with immediate values.  */
+/* { dg-do compile { target { atomic_model_hard_llcs_available } } }  */
+/* { dg-options "-O2 -matomic-model=hard-llcs,strict" }  */
+/* { dg-final { scan-assembler-times "add\t#1" 6 } }  */
+/* { dg-final { scan-assembler-times "add\t#-1" 6 } }  */
+/* { dg-final { scan-assembler-times "and\t#1" 12 } }  */
+/* { dg-final { scan-assembler-times "\tor\t#1" 6 } }  */
+/* { dg-final { scan-assembler-times "xor\t#1" 6 } }  */
+/* { dg-final { scan-assembler-times "cmp/eq\t#1" 1 } }  */
+
+#include "pr64659-0.h"

gcc/testsuite/gcc.target/sh/sh.exp

@@ -33,6 +33,34 @@ proc check_effective_target_sh2a { } {
     } ""]
 }
 
+# Return 1 if target supports atomic-model=soft-gusa
+proc check_effective_target_atomic_model_soft_gusa_available { } {
+    return [check_no_compiler_messages atomic_model_soft_gusa_available object {
+	     int x = 0;
+    } "-matomic-model=soft-gusa"]
+}
+
+# Return 1 if target supports atomic-model=soft-tcb
+proc check_effective_target_atomic_model_soft_tcb_available { } {
+    return [check_no_compiler_messages atomic_model_soft_tcb_available object {
+	     int x = 0;
+    } "-matomic-model=soft-tcb,gbr-offset=0"]
+}
+
+# Return 1 if target supports atomic-model=soft-imask
+proc check_effective_target_atomic_model_soft_imask_available { } {
+    return [check_no_compiler_messages atomic_model_soft_imask_available object {
+	     int x = 0;
+    } "-matomic-model=soft-imask -mno-usermode"]
+}
+
+# Return 1 if target supports atomic-model=hard-llcs
+proc check_effective_target_atomic_model_hard_llcs_available { } {
+    return [check_no_compiler_messages atomic_model_hard_llcs_available object {
+	     int x = 0;
+    } "-matomic-model=hard-llcs"]
+}
+
 # If a testcase doesn't have special options, use these.
 global DEFAULT_CFLAGS
 if ![info exists DEFAULT_CFLAGS] then {