Commit c73a5e94 by Richard Henderson Committed by Richard Henderson

m32r.c (move_src_operand): Fix 32-bit int test.

        * config/m32r/m32r.c (move_src_operand): Fix 32-bit int test.
        * config/m32r/m32r.md (and ior xor splitters): Swap operands
        to match insn patterns.

From-SVN: r48679
parent 9dee8c45
2002-01-09 Richard Henderson <rth@redhat.com> 2002-01-09 Richard Henderson <rth@redhat.com>
* config/m32r/m32r.c (move_src_operand): Fix 32-bit int test.
* config/m32r/m32r.md (and ior xor splitters): Swap operands
to match insn patterns.
2002-01-09 Richard Henderson <rth@redhat.com>
* regrename.c (find_oldest_value_reg): Use gen_rtx_raw_REG. * regrename.c (find_oldest_value_reg): Use gen_rtx_raw_REG.
(copyprop_hardreg_forward_1): Likewise. (copyprop_hardreg_forward_1): Likewise.
......
...@@ -793,7 +793,13 @@ move_src_operand (op, mode) ...@@ -793,7 +793,13 @@ move_src_operand (op, mode)
loadable with one insn, and split the rest into two. The instances loadable with one insn, and split the rest into two. The instances
where this would help should be rare and the current way is where this would help should be rare and the current way is
simpler. */ simpler. */
return UINT32_P (INTVAL (op)); if (HOST_BITS_PER_WIDE_INT > 32)
{
HOST_WIDE_INT rest = INTVAL (op) >> 31;
return (rest == 0 || rest == -1);
}
else
return 1;
case LABEL_REF : case LABEL_REF :
return TARGET_ADDR24; return TARGET_ADDR24;
case CONST_DOUBLE : case CONST_DOUBLE :
......
...@@ -1032,7 +1032,7 @@ ...@@ -1032,7 +1032,7 @@
(match_operand:SI 2 "int8_operand" "")))] (match_operand:SI 2 "int8_operand" "")))]
"optimize_size && m32r_not_same_reg (operands[0], operands[1])" "optimize_size && m32r_not_same_reg (operands[0], operands[1])"
[(set (match_dup 0) (match_dup 2)) [(set (match_dup 0) (match_dup 2))
(set (match_dup 0) (and:SI (match_dup 1) (match_dup 0)))] (set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))]
"") "")
(define_insn "iorsi3" (define_insn "iorsi3"
...@@ -1064,7 +1064,7 @@ ...@@ -1064,7 +1064,7 @@
(match_operand:SI 2 "int8_operand" "")))] (match_operand:SI 2 "int8_operand" "")))]
"optimize_size && m32r_not_same_reg (operands[0], operands[1])" "optimize_size && m32r_not_same_reg (operands[0], operands[1])"
[(set (match_dup 0) (match_dup 2)) [(set (match_dup 0) (match_dup 2))
(set (match_dup 0) (ior:SI (match_dup 1) (match_dup 0)))] (set (match_dup 0) (ior:SI (match_dup 0) (match_dup 1)))]
"") "")
(define_insn "xorsi3" (define_insn "xorsi3"
...@@ -1096,7 +1096,7 @@ ...@@ -1096,7 +1096,7 @@
(match_operand:SI 2 "int8_operand" "")))] (match_operand:SI 2 "int8_operand" "")))]
"optimize_size && m32r_not_same_reg (operands[0], operands[1])" "optimize_size && m32r_not_same_reg (operands[0], operands[1])"
[(set (match_dup 0) (match_dup 2)) [(set (match_dup 0) (match_dup 2))
(set (match_dup 0) (xor:SI (match_dup 1) (match_dup 0)))] (set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))]
"") "")
(define_insn "negsi2" (define_insn "negsi2"
......
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