Commit c727fb67 by Richard Sandiford Committed by Richard Sandiford

rs6000.md (insvsi, [...]): Rename to...

gcc/
	* config/rs6000/rs6000.md (insvsi, insvdi, extvsi, extvdi): Rename to...
	(insvsi_internal, insvdi_internal, extvsi_internal)
	(extvdi_internal): ...this.
	(insv, extv): Update accordingly.

From-SVN: r193027
parent 7ae6664b
2012-10-31 Richard Sandiford <rdsandiford@googlemail.com> 2012-10-31 Richard Sandiford <rdsandiford@googlemail.com>
* config/rs6000/rs6000.md (insvsi, insvdi, extvsi, extvdi): Rename to...
(insvsi_internal, insvdi_internal, extvsi_internal)
(extvdi_internal): ...this.
(insv, extv): Update accordingly.
2012-10-31 Richard Sandiford <rdsandiford@googlemail.com>
* combine.c (simplify_comparison): If BITS_BIG_ENDIAN, always assume * combine.c (simplify_comparison): If BITS_BIG_ENDIAN, always assume
that zero_extracts of const_ints are doing word-sized extractions. that zero_extracts of const_ints are doing word-sized extractions.
...@@ -3126,13 +3126,15 @@ ...@@ -3126,13 +3126,15 @@
FAIL; FAIL;
if (TARGET_POWERPC64 && GET_MODE (operands[0]) == DImode) if (TARGET_POWERPC64 && GET_MODE (operands[0]) == DImode)
emit_insn (gen_insvdi (operands[0], operands[1], operands[2], operands[3])); emit_insn (gen_insvdi_internal (operands[0], operands[1], operands[2],
operands[3]));
else else
emit_insn (gen_insvsi (operands[0], operands[1], operands[2], operands[3])); emit_insn (gen_insvsi_internal (operands[0], operands[1], operands[2],
operands[3]));
DONE; DONE;
}") }")
(define_insn "insvsi" (define_insn "insvsi_internal"
[(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r") [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r")
(match_operand:SI 1 "const_int_operand" "i") (match_operand:SI 1 "const_int_operand" "i")
(match_operand:SI 2 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i"))
...@@ -3267,7 +3269,7 @@ ...@@ -3267,7 +3269,7 @@
}" }"
[(set_attr "type" "insert_word")]) [(set_attr "type" "insert_word")])
(define_insn "insvdi" (define_insn "insvdi_internal"
[(set (zero_extract:DI (match_operand:DI 0 "gpc_reg_operand" "+r") [(set (zero_extract:DI (match_operand:DI 0 "gpc_reg_operand" "+r")
(match_operand:SI 1 "const_int_operand" "i") (match_operand:SI 1 "const_int_operand" "i")
(match_operand:SI 2 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i"))
...@@ -3339,13 +3341,15 @@ ...@@ -3339,13 +3341,15 @@
FAIL; FAIL;
if (TARGET_POWERPC64 && GET_MODE (operands[1]) == DImode) if (TARGET_POWERPC64 && GET_MODE (operands[1]) == DImode)
emit_insn (gen_extzvdi (operands[0], operands[1], operands[2], operands[3])); emit_insn (gen_extzvdi_internal (operands[0], operands[1], operands[2],
operands[3]));
else else
emit_insn (gen_extzvsi (operands[0], operands[1], operands[2], operands[3])); emit_insn (gen_extzvsi_internal (operands[0], operands[1], operands[2],
operands[3]));
DONE; DONE;
}") }")
(define_insn "extzvsi" (define_insn "extzvsi_internal"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(zero_extract:SI (match_operand:SI 1 "gpc_reg_operand" "r") (zero_extract:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i") (match_operand:SI 2 "const_int_operand" "i")
...@@ -3472,7 +3476,7 @@ ...@@ -3472,7 +3476,7 @@
(const_int 0)))] (const_int 0)))]
"") "")
(define_insn "extzvdi" (define_insn "extzvdi_internal"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r") [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(zero_extract:DI (match_operand:DI 1 "gpc_reg_operand" "r") (zero_extract:DI (match_operand:DI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i") (match_operand:SI 2 "const_int_operand" "i")
......
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