config.gcc (arm*-wince-pe*, [...]): Add arm/pe.opt to $extra_options.

	* config.gcc (arm*-wince-pe*, arm-*-pe*, strongarm-*-pe): Add
	arm/pe.opt to $extra_options.
	* config/arm/arm.h (target_flags, target_fpu_name, target_fpe_name)
	(target_float_abi_name, target_float_switch, target_abi_name)
	(ARM_FLAG_APCS_FRAME, ARM_FLAG_POKE, ARM_FLAG_FPE, ARM_FLAG_APCS_STACK)
	(ARM_FLAG_APCS_FLOAT, ARM_FLAG_APCS_REENT, ARM_FLAG_BIG_END)
	(ARM_FLAG_INTERWORK, ARM_FLAG_LITTLE_WORDS, ARM_FLAG_NO_SCHED_PRO)
	(ARM_FLAG_ABORT_NORETURN, ARM_FLAG_SINGLE_PIC_BASE)
	(ARM_FLAG_LONG_CALLS, ARM_FLAG_THUMB, THUMB_FLAG_BACKTRACE)
	(THUMB_FLAG_LEAF_BACKTRACE, THUMB_FLAG_CALLEE_SUPER_INTERWORKING)
	(THUMB_FLAG_CALLER_SUPER_INTERWORKING, CIRRUS_FIX_INVALID_INSNS)
	(TARGET_APCS_FRAME, TARGET_POKE_FUNCTION_NAME, TARGET_FPE)
	(TARGET_APCS_STACK, TARGET_APCS_FLOAT, TARGET_APCS_REENT)
	(TARGET_BIG_END, TARGET_INTERWORK, TARGET_LITTLE_WORDS)
	(TARGET_NO_SCHED_PRO, TARGET_ABORT_NORETURN, TARGET_SINGLE_PIC_BASE)
	(TARGET_LONG_CALLS, TARGET_THUMB, TARGET_CALLER_INTERWORKING)
	(TARGET_CIRRUS_FIX_INVALID_INSNS, SUBTARGET_SWITCHES, TARGET_SWITCHES)
	(TARGET_OPTIONS, arm_cpu_select, arm_select,  structure_size_string)
	(arm_pic_register_string): Delete.
	(TARGET_BACKTRACE): Redefine using TARGET_TPCS_LEAF_FRAME and
	TARGET_TPCS_FRAME.
	(TARGET_DEFAULT, CONDITIONAL_REGISTER_USAGE): Update mask names.
	* config/arm/coff.h (TARGET_DEFAULT): Likewise.
	* config/arm/elf.h (TARGET_DEFAULT): Likewise.
	* config/arm/netbsd-elf.h (TARGET_DEFAULT): Likewise.
	* config/arm/netbsd.h (TARGET_DEFAULT): Likewise.
	* config/arm/semi.h (TARGET_DEFAULT): Likewise.
	* config/arm/uclinux-elf.h (TARGET_DEFAULT): Likewise.
	* config/arm/wince-pe.h (TARGET_DEFAULT): Likewise.
	* config/arm/pe.h (TARGET_DEFAULT): Likewise.
	(TARGET_FLAG_NOP_FUN, TARGET_NOP_FUN_DLLIMPORT): Delete.
	(SUBTARGET_SWITCHES): Delete.
	* config/arm/arm.c (target_float_switch): Delete.
	(arm_cpu_select): Moved from config/arm/arm.h.
	(target_fpu_name, target_fpe_name, target_float_abi_name)
	(target_abi_name, structure_size_string, arm_pic_register_string)
	(arm_select): Make static.
	(TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults.
	(arm_handle_option): New function.
	(arm_override_options): Update target_flags checks for new mask names.
	Remove target_float_switch code.
	(arm_expand_prologue, thumb_expand_prologue): Check
	!TARGET_SCHED_PROLOG instead of TARGET_NO_SCHED_PRO.
	* config/arm/arm.opt, config/arm/pe.opt: New files.

From-SVN: r99265

gcc/ChangeLog

+2005-05-05  Richard Sandiford  <rsandifo@redhat.com>
+
+	* config.gcc (arm*-wince-pe*, arm-*-pe*, strongarm-*-pe): Add
+	arm/pe.opt to $extra_options.
+	* config/arm/arm.h (target_flags, target_fpu_name, target_fpe_name)
+	(target_float_abi_name, target_float_switch, target_abi_name)
+	(ARM_FLAG_APCS_FRAME, ARM_FLAG_POKE, ARM_FLAG_FPE, ARM_FLAG_APCS_STACK)
+	(ARM_FLAG_APCS_FLOAT, ARM_FLAG_APCS_REENT, ARM_FLAG_BIG_END)
+	(ARM_FLAG_INTERWORK, ARM_FLAG_LITTLE_WORDS, ARM_FLAG_NO_SCHED_PRO)
+	(ARM_FLAG_ABORT_NORETURN, ARM_FLAG_SINGLE_PIC_BASE)
+	(ARM_FLAG_LONG_CALLS, ARM_FLAG_THUMB, THUMB_FLAG_BACKTRACE)
+	(THUMB_FLAG_LEAF_BACKTRACE, THUMB_FLAG_CALLEE_SUPER_INTERWORKING)
+	(THUMB_FLAG_CALLER_SUPER_INTERWORKING, CIRRUS_FIX_INVALID_INSNS)
+	(TARGET_APCS_FRAME, TARGET_POKE_FUNCTION_NAME, TARGET_FPE)
+	(TARGET_APCS_STACK, TARGET_APCS_FLOAT, TARGET_APCS_REENT)
+	(TARGET_BIG_END, TARGET_INTERWORK, TARGET_LITTLE_WORDS)
+	(TARGET_NO_SCHED_PRO, TARGET_ABORT_NORETURN, TARGET_SINGLE_PIC_BASE)
+	(TARGET_LONG_CALLS, TARGET_THUMB, TARGET_CALLER_INTERWORKING)
+	(TARGET_CIRRUS_FIX_INVALID_INSNS, SUBTARGET_SWITCHES, TARGET_SWITCHES)
+	(TARGET_OPTIONS, arm_cpu_select, arm_select,  structure_size_string)
+	(arm_pic_register_string): Delete.
+	(TARGET_BACKTRACE): Redefine using TARGET_TPCS_LEAF_FRAME and
+	TARGET_TPCS_FRAME.
+	(TARGET_DEFAULT, CONDITIONAL_REGISTER_USAGE): Update mask names.
+	* config/arm/coff.h (TARGET_DEFAULT): Likewise.
+	* config/arm/elf.h (TARGET_DEFAULT): Likewise.
+	* config/arm/netbsd-elf.h (TARGET_DEFAULT): Likewise.
+	* config/arm/netbsd.h (TARGET_DEFAULT): Likewise.
+	* config/arm/semi.h (TARGET_DEFAULT): Likewise.
+	* config/arm/uclinux-elf.h (TARGET_DEFAULT): Likewise.
+	* config/arm/wince-pe.h (TARGET_DEFAULT): Likewise.
+	* config/arm/pe.h (TARGET_DEFAULT): Likewise.
+	(TARGET_FLAG_NOP_FUN, TARGET_NOP_FUN_DLLIMPORT): Delete.
+	(SUBTARGET_SWITCHES): Delete.
+	* config/arm/arm.c (target_float_switch): Delete.
+	(arm_cpu_select): Moved from config/arm/arm.h.
+	(target_fpu_name, target_fpe_name, target_float_abi_name)
+	(target_abi_name, structure_size_string, arm_pic_register_string)
+	(arm_select): Make static.
+	(TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults.
+	(arm_handle_option): New function.
+	(arm_override_options): Update target_flags checks for new mask names.
+	Remove target_float_switch code.
+	(arm_expand_prologue, thumb_expand_prologue): Check
+	!TARGET_SCHED_PROLOG instead of TARGET_NO_SCHED_PRO.
+	* config/arm/arm.opt, config/arm/pe.opt: New files.
+
 2005-05-05  Nathan Sidwell  <nathan@codesourcery.com>
 
 	* config/arc/arc.c (get_arc_condition_code): Use gcc_assert &

gcc/config.gcc

@@ -715,11 +715,13 @@ arm*-*-elf | ep9312-*-elf)
 arm*-wince-pe*)
 	tm_file="arm/semi.h arm/aout.h arm/arm.h arm/coff.h dbxcoff.h arm/pe.h arm/wince-pe.h"
 	tmake_file="arm/t-arm arm/t-wince-pe"
+	extra_options="${extra_options} arm/pe.opt"
 	extra_objs="pe.o"
 	;;
 arm-*-pe*)
 	tm_file="arm/semi.h arm/aout.h arm/arm.h arm/coff.h dbxcoff.h arm/pe.h"
 	tmake_file="arm/t-arm arm/t-pe"
+	extra_options="${extra_options} arm/pe.opt"
 	extra_objs="pe.o"
 	;;
 arm*-*-kaos*)
@@ -2113,6 +2115,7 @@ strongarm-*-pe)
 	out_file=arm/arm.c
 	md_file=arm/arm.md
 	extra_modes=arm/arm-modes.def
+	extra_options="${extra_options} arm/pe.opt"
 	extra_objs=pe.o
 	use_fixproto=yes
 	;;

gcc/config/arm/arm.c

@@ -181,6 +181,7 @@ static void arm_cxx_determine_class_data_visibility (tree);
 static bool arm_cxx_class_data_always_comdat (void);
 static bool arm_cxx_use_aeabi_atexit (void);
 static void arm_init_libfuncs (void);
+static bool arm_handle_option (size_t, const char *, int);
 static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode);
 
 /* Initialize the GCC target structure.  */
@@ -221,6 +222,11 @@ static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode);
 #undef  TARGET_ASM_FUNCTION_EPILOGUE
 #define TARGET_ASM_FUNCTION_EPILOGUE arm_output_function_epilogue
 
+#undef  TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG)
+#undef  TARGET_HANDLE_OPTION
+#define TARGET_HANDLE_OPTION arm_handle_option
+
 #undef  TARGET_COMP_TYPE_ATTRIBUTES
 #define TARGET_COMP_TYPE_ATTRIBUTES arm_comp_type_attributes
 
@@ -368,22 +374,19 @@ enum float_abi_type arm_float_abi;
 enum arm_abi_type arm_abi;
 
 /* Set by the -mfpu=... option.  */
-const char * target_fpu_name = NULL;
+static const char * target_fpu_name = NULL;
 
 /* Set by the -mfpe=... option.  */
-const char * target_fpe_name = NULL;
+static const char * target_fpe_name = NULL;
 
 /* Set by the -mfloat-abi=... option.  */
-const char * target_float_abi_name = NULL;
-
-/* Set by the legacy -mhard-float and -msoft-float options.  */
-const char * target_float_switch = NULL;
+static const char * target_float_abi_name = NULL;
 
 /* Set by the -mabi=... option.  */
-const char * target_abi_name = NULL;
+static const char * target_abi_name = NULL;
 
 /* Used to parse -mstructure_size_boundary command line option.  */
-const char * structure_size_string = NULL;
+static const char * structure_size_string = NULL;
 int    arm_structure_size_boundary = DEFAULT_STRUCTURE_SIZE_BOUNDARY;
 
 /* Used for Thumb call_via trampolines.  */
@@ -494,7 +497,7 @@ int arm_cpp_interwork = 0;
 enum machine_mode output_memory_reference_mode;
 
 /* The register number to be used for the PIC offset register.  */
-const char * arm_pic_register_string = NULL;
+static const char * arm_pic_register_string = NULL;
 int arm_pic_register = INVALID_REGNUM;
 
 /* Set to 1 when a return insn is output, this means that the epilogue
@@ -574,11 +577,18 @@ static const struct processors all_architectures[] =
   {NULL, arm_none, NULL, 0 , NULL}
 };
 
+struct arm_cpu_select
+{
+  const char *              string;
+  const char *              name;
+  const struct processors * processors;
+};
+
 /* This is a magic structure.  The 'string' field is magically filled in
    with a pointer to the value specified by the user on the command line
    assuming that the user has specified such a value.  */
 
-struct arm_cpu_select arm_select[] =
+static struct arm_cpu_select arm_select[] =
 {
   /* string	  name            processors  */
   { NULL,	"-mcpu=",	all_cores  },
@@ -779,6 +789,63 @@ arm_init_libfuncs (void)
   set_optab_libfunc (umod_optab, SImode, NULL);
 }
 
+/* Implement TARGET_HANDLE_OPTION.  */
+
+static bool
+arm_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED)
+{
+  switch (code)
+    {
+    case OPT_mabi_:
+      target_abi_name = arg;
+      return true;
+
+    case OPT_march_:
+      arm_select[1].string = arg;
+      return true;
+
+    case OPT_mcpu_:
+      arm_select[0].string = arg;
+      return true;
+
+    case OPT_mfloat_abi_:
+      target_float_abi_name = arg;
+      return true;
+
+    case OPT_mfp_:
+    case OPT_mfpe_:
+      target_fpe_name = arg;
+      return true;
+
+    case OPT_mfpu_:
+      target_fpu_name = arg;
+      return true;
+
+    case OPT_mhard_float:
+      target_float_abi_name = "hard";
+      return true;
+
+    case OPT_mpic_register_:
+      arm_pic_register_string = arg;
+      return true;
+
+    case OPT_msoft_float:
+      target_float_abi_name = "soft";
+      return true;
+
+    case OPT_mstructure_size_boundary_:
+      structure_size_string = arg;
+      return true;
+
+    case OPT_mtune_:
+      arm_select[2].string = arg;
+      return true;
+
+    default:
+      return true;
+    }
+}
+
 /* Fix up any incompatible options that the user has specified.
    This has now turned into a maze.  */
 void
@@ -938,25 +1005,24 @@ arm_override_options (void)
   if (TARGET_INTERWORK && !(insn_flags & FL_THUMB))
     {
       warning (0, "target CPU does not support interworking" );
-      target_flags &= ~ARM_FLAG_INTERWORK;
+      target_flags &= ~MASK_INTERWORK;
     }
 
   if (TARGET_THUMB && !(insn_flags & FL_THUMB))
     {
       warning (0, "target CPU does not support THUMB instructions");
-      target_flags &= ~ARM_FLAG_THUMB;
+      target_flags &= ~MASK_THUMB;
     }
 
   if (TARGET_APCS_FRAME && TARGET_THUMB)
     {
       /* warning (0, "ignoring -mapcs-frame because -mthumb was used"); */
-      target_flags &= ~ARM_FLAG_APCS_FRAME;
+      target_flags &= ~MASK_APCS_FRAME;
     }
 
   /* TARGET_BACKTRACE calls leaf_function_p, which causes a crash if done
      from here where no function is being compiled currently.  */
-  if ((target_flags & (THUMB_FLAG_LEAF_BACKTRACE | THUMB_FLAG_BACKTRACE))
-      && TARGET_ARM)
+  if ((TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME) && TARGET_ARM)
     warning (0, "enabling backtrace support is only meaningful when compiling for the Thumb");
 
   if (TARGET_ARM && TARGET_CALLEE_INTERWORKING)
@@ -968,11 +1034,11 @@ arm_override_options (void)
   if (TARGET_APCS_STACK && !TARGET_APCS_FRAME)
     {
       warning (0, "-mapcs-stack-check incompatible with -mno-apcs-frame");
-      target_flags |= ARM_FLAG_APCS_FRAME;
+      target_flags |= MASK_APCS_FRAME;
     }
 
   if (TARGET_POKE_FUNCTION_NAME)
-    target_flags |= ARM_FLAG_APCS_FRAME;
+    target_flags |= MASK_APCS_FRAME;
 
   if (TARGET_APCS_REENT && flag_pic)
     error ("-fpic and -mapcs-reent are incompatible");
@@ -985,7 +1051,7 @@ arm_override_options (void)
   if (TARGET_ARM
       && write_symbols != NO_DEBUG
       && !TARGET_APCS_FRAME
-      && (TARGET_DEFAULT & ARM_FLAG_APCS_FRAME))
+      && (TARGET_DEFAULT & MASK_APCS_FRAME))
     warning (0, "-g with -mno-apcs-frame may not give sensible debugging");
 
   /* If stack checking is disabled, we can use r10 as the PIC register,
@@ -1022,7 +1088,7 @@ arm_override_options (void)
     arm_cpp_interwork = 1;
 
   if (arm_arch5)
-    target_flags &= ~ARM_FLAG_INTERWORK;
+    target_flags &= ~MASK_INTERWORK;
 
   if (target_abi_name)
     {
@@ -1114,14 +1180,6 @@ arm_override_options (void)
 	error ("invalid floating point abi: -mfloat-abi=%s",
 	       target_float_abi_name);
     }
-  else if (target_float_switch)
-    {
-      /* This is a bit of a hack to avoid needing target flags for these.  */
-      if (target_float_switch[0] == 'h')
-	arm_float_abi = ARM_FLOAT_ABI_HARD;
-      else
-	arm_float_abi = ARM_FLOAT_ABI_SOFT;
-    }
   else
     arm_float_abi = TARGET_DEFAULT_FLOAT_ABI;
 
@@ -10350,7 +10408,7 @@ arm_expand_prologue (void)
   /* If we are profiling, make sure no instructions are scheduled before
      the call to mcount.  Similarly if the user has requested no
      scheduling in the prolog.  */
-  if (current_function_profile || TARGET_NO_SCHED_PRO)
+  if (current_function_profile || !TARGET_SCHED_PROLOG)
     emit_insn (gen_blockage ());
 
   /* If the link register is being kept alive, with the return address in it,
@@ -13171,7 +13229,7 @@ thumb_expand_prologue (void)
 				  hard_frame_pointer_rtx));
     }
 
-  if (current_function_profile || TARGET_NO_SCHED_PRO)
+  if (current_function_profile || !TARGET_SCHED_PROLOG)
     emit_insn (gen_blockage ());
 
   cfun->machine->lr_save_eliminated = !thumb_force_lr_save ();
@@ -13220,7 +13278,7 @@ thumb_expand_epilogue (void)
      the stack adjustment will not be deleted.  */
   emit_insn (gen_prologue_use (stack_pointer_rtx));
 
-  if (current_function_profile || TARGET_NO_SCHED_PRO)
+  if (current_function_profile || !TARGET_SCHED_PROLOG)
     emit_insn (gen_blockage ());
 
   /* Emit a clobber for each insn that will be restored in the epilogue,

gcc/config/arm/arm.opt

+; Options for the ARM port of the compiler.
+
+; Copyright (C) 2005 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 2, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING.  If not, write to the Free
+; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+; 02111-1307, USA.
+
+mabi=
+Target RejectNegative Joined
+Specify an ABI
+
+mabort-on-noreturn
+Target Report Mask(ABORT_NORETURN)
+Generate a call to abort if a noreturn function returns
+
+mapcs
+Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented
+
+mapcs-float
+Target Report Mask(APCS_FLOAT)
+Pass FP arguments in FP registers
+
+mapcs-frame
+Target Report Mask(APCS_FRAME)
+Generate APCS conformant stack frames
+
+mapcs-reentrant
+Target Report Mask(APCS_REENT)
+Generate re-entrant, PIC code
+
+mapcs-stack-check
+Target Report Mask(APCS_STACK) Undocumented
+
+march=
+Target RejectNegative Joined
+Specify the name of the target architecture
+
+marm
+Target RejectNegative InverseMask(THUMB) Undocumented
+
+mbig-endian
+Target Report RejectNegative Mask(BIG_END)
+Assume target CPU is configured as big endian
+
+mcallee-super-interworking
+Target Report Mask(CALLEE_INTERWORKING)
+Thumb: Assume non-static functions may be called from ARM code
+
+mcaller-super-interworking
+Target Report Mask(CALLER_INTERWORKING)
+Thumb: Assume function pointers may go to non-Thumb aware code
+
+mcirrus-fix-invalid-insns
+Target Report Mask(CIRRUS_FIX_INVALID_INSNS)
+Cirrus: Place NOPs to avoid invalid instruction combinations
+
+mcpu=
+Target RejectNegative Joined
+Specify the name of the target CPU
+
+mfloat-abi=
+Target RejectNegative Joined
+Specify if floating point hardware should be used
+
+mfp=
+Target RejectNegative Joined Undocumented
+
+;; Now ignored.
+mfpe
+Target RejectNegative Mask(FPE) Undocumented
+
+mfpe=
+Target RejectNegative Joined Undocumented
+
+mfpu=
+Target RejectNegative Joined
+Specify the name of the target floating point hardware/format
+
+mhard-float
+Target RejectNegative
+Alias for -mfloat-abi=hard
+
+mlittle-endian
+Target Report RejectNegative InverseMask(BIG_END)
+Assume target CPU is configured as little endian
+
+mlong-calls
+Target Report Mask(LONG_CALLS)
+Generate call insns as indirect calls, if necessary
+
+mpic-register=
+Target RejectNegative Joined
+Specify the register to be used for PIC addressing
+
+mpoke-function-name
+Target Report Mask(POKE_FUNCTION_NAME)
+Store function names in object code
+
+msched-prolog
+Target Report Mask(SCHED_PROLOG)
+Permit scheduling of a function's prologue sequence
+
+msingle-pic-base
+Target Report Mask(SINGLE_PIC_BASE)
+Do not load the PIC register in function prologues
+
+msoft-float
+Target RejectNegative
+Alias for -mfloat-abi=soft
+
+mstructure-size-boundary=
+Target RejectNegative Joined
+Specify the minimum bit alignment of structures
+
+mthumb
+Target Report Mask(THUMB)
+Compile for the Thumb not the ARM
+
+mthumb-interwork
+Target Report Mask(INTERWORK)
+Support calls between Thumb and ARM instruction sets
+
+mtpcs-frame
+Target Report Mask(TPCS_FRAME)
+Thumb: Generate (non-leaf) stack frames even if not needed
+
+mtpcs-leaf-frame
+Target Report Mask(TPCS_LEAF_FRAME)
+Thumb: Generate (leaf) stack frames even if not needed
+
+mtune=
+Target RejectNegative Joined
+Tune code for the given processor
+
+mwords-little-endian
+Target Report RejectNegative Mask(LITTLE_WORDS)
+Assume big endian bytes, little endian words

gcc/config/arm/coff.h

@@ -34,7 +34,7 @@
 #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
 
 #undef  TARGET_DEFAULT
-#define TARGET_DEFAULT (ARM_FLAG_APCS_FRAME)
+#define TARGET_DEFAULT (MASK_APCS_FRAME)
 
 #ifndef MULTILIB_DEFAULTS
 #define MULTILIB_DEFAULTS \

gcc/config/arm/elf.h

@@ -108,7 +108,7 @@
 #endif
 
 #ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT (ARM_FLAG_APCS_FRAME)
+#define TARGET_DEFAULT (MASK_APCS_FRAME)
 #endif
 
 #ifndef MULTILIB_DEFAULTS

gcc/config/arm/netbsd-elf.h

@@ -35,7 +35,7 @@
 /* Default it to use ATPCS with soft-VFP.  */
 #undef TARGET_DEFAULT
 #define TARGET_DEFAULT			\
-  (ARM_FLAG_APCS_FRAME			\
+  (MASK_APCS_FRAME			\
    | TARGET_ENDIAN_DEFAULT)
 
 #undef ARM_DEFAULT_ABI

gcc/config/arm/netbsd.h

@@ -36,7 +36,7 @@
 #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
 
 #undef TARGET_DEFAULT
-#define TARGET_DEFAULT (ARM_FLAG_APCS_FRAME)
+#define TARGET_DEFAULT (MASK_APCS_FRAME)
 
 /* Some defines for CPP.
    arm32 is the NetBSD port name, so we always define arm32 and __arm32__.  */
@@ -58,7 +58,7 @@
 %(cpp_cpu_arch) %(cpp_float) %(cpp_endian) %(netbsd_cpp_spec) \
 "
 
-/* Because TARGET_DEFAULT sets ARM_FLAG_SOFT_FLOAT */
+/* Because TARGET_DEFAULT sets MASK_SOFT_FLOAT */
 #undef CPP_FLOAT_DEFAULT_SPEC
 #define CPP_FLOAT_DEFAULT_SPEC "-D__SOFTFP__"
 

gcc/config/arm/pe.h

@@ -45,22 +45,8 @@
 #undef  SUBTARGET_CPP_SPEC
 #define SUBTARGET_CPP_SPEC "-D__pe__"
 
-
-/* Experimental addition for pr 7885.
-   Ignore dllimport for functions.  */
-#define TARGET_FLAG_NOP_FUN	(1 << 24)
-
-#undef  TARGET_NOP_FUN_DLLIMPORT
-#define TARGET_NOP_FUN_DLLIMPORT (target_flags & TARGET_FLAG_NOP_FUN)
-
-#undef  SUBTARGET_SWITCHES
-#define SUBTARGET_SWITCHES					\
-{ "nop-fun-dllimport",		  TARGET_FLAG_NOP_FUN,		\
-  N_("Ignore dllimport attribute for functions") },		\
-{ "no-nop-fun-dllimport",	- TARGET_FLAG_NOP_FUN, "" },
-
 #undef  TARGET_DEFAULT
-#define TARGET_DEFAULT	(TARGET_FLAG_NOP_FUN)
+#define TARGET_DEFAULT	(MASK_NOP_FUN_DLLIMPORT)
 
 #undef  MULTILIB_DEFAULTS
 #define MULTILIB_DEFAULTS \

gcc/config/arm/pe.opt

+; PE-specific options for the ARM port
+
+; Copyright (C) 2005 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 2, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING.  If not, write to the Free
+; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+; 02111-1307, USA.
+
+mnop-fun-dllimport
+Target Report Mask(NOP_FUN_DLLIMPORT)
+Ignore dllimport attribute for functions

gcc/config/arm/semi.h

@@ -43,7 +43,7 @@
 #endif
 
 #ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT (ARM_FLAG_APCS_FRAME)
+#define TARGET_DEFAULT (MASK_APCS_FRAME)
 #endif
 
 #ifndef SUBTARGET_EXTRA_SPECS

gcc/config/arm/uclinux-elf.h

@@ -27,4 +27,4 @@
 #define TARGET_VERSION fputs (" (ARM/ELF ucLinux)", stderr);
 
 #undef  TARGET_DEFAULT
-#define TARGET_DEFAULT (ARM_FLAG_SINGLE_PIC_BASE)
+#define TARGET_DEFAULT (MASK_SINGLE_PIC_BASE)

gcc/config/arm/wince-pe.h

@@ -20,7 +20,7 @@
    Boston, MA 02111-1307, USA.  */
 
 #undef  TARGET_DEFAULT
-#define TARGET_DEFAULT	(TARGET_FLAG_NOP_FUN)
+#define TARGET_DEFAULT	(MASK_NOP_FUN_DLLIMPORT)
 
 #undef  MULTILIB_DEFAULTS
 #define MULTILIB_DEFAULTS \