i386.c (ix86_expand_setcc): Don't use method 0 before CSE.

        * config/i386/i386.c (ix86_expand_setcc): Don't use method 0
        before CSE.
        * config/i386/i386.md: New setcc+movzbl peephole2.

From-SVN: r44279

gcc/ChangeLog

+2001-07-23  Richard Henderson  <rth@redhat.com>
+
+	* config/i386/i386.c (ix86_expand_setcc): Don't use method 0
+	before CSE.
+	* config/i386/i386.md: New setcc+movzbl peephole2.
+
 2001-07-23  Neil Booth  <neil@cat.daikokuya.demon.co.uk>
 
 	* objc/Make-lang.in (objc-act.o): Depend on debug.h.

gcc/config/i386/i386.c

@@ -6357,9 +6357,12 @@ ix86_expand_setcc (code, dest)
           emit subreg setcc, zero extend.
      2 -- destination is in QImode:
           emit setcc only.
-  */
 
-  type = 0;
+     We don't use mode 0 early in compilation because it confuses CSE.
+     There are peepholes to turn mode 1 into mode 0 if things work out
+     nicely after reload.  */
+
+  type = cse_not_expected ? 0 : 1;
 
   if (GET_MODE (dest) == QImode)
     type = 2;

gcc/config/i386/i386.md

@@ -13133,6 +13133,25 @@
 			   (match_dup 0)
 			   (pc)))]
   "")
+
+;; Convert setcc + movzbl to xor + setcc if operands don't overlap.
+
+(define_peephole2
+  [(set (reg 17) (match_operand 0 "" ""))
+   (set (match_operand:QI 1 "register_operand" "")
+	(match_operator:QI 2 "ix86_comparison_operator"
+	  [(reg 17) (const_int 0)]))
+   (set (match_operand 3 "q_regs_operand" "")
+	(zero_extend (match_dup 1)))]
+  "peep2_reg_dead_p (3, operands[1])
+   && ! reg_overlap_mentioned_p (operands[3], operands[0])"
+  [(parallel [(set (match_dup 3) (const_int 0))
+	      (clobber (reg:CC 17))])
+   (set (match_dup 4) (match_dup 0))
+   (set (strict_low_part (match_dup 5))
+	(match_dup 2))]
+  "operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
+   operands[5] = gen_rtx_REG (QImode, REGNO (operands[3]));")
 
 ;; Call instructions.